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https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
configs: Disable now unbuildable SPI options for boards
Now that various SPI related options depend on CONFIG_DEPRECATED, in order for platforms to build out of the box they need to disable various other options. Cc: Albert ARIBAUD <albert.aribaud@3adev.fr> Cc: Marek Vasut <marex@denx.de> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
parent
ea73ec08d1
commit
88369d33e3
18 changed files with 21 additions and 71 deletions
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@ -174,6 +174,7 @@ int board_mmc_init(bd_t *bis)
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static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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{
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#ifdef CONFIG_DEPRECATED
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struct spi_flash *spi;
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int ret;
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@ -190,6 +191,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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return 1;
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}
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spi_flash_free(spi);
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#endif
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return 0;
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}
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@ -239,6 +241,7 @@ int board_late_init(void)
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return 0;
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}
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#ifdef CONFIG_DEPRECATED
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int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int i, ret;
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@ -302,3 +305,4 @@ U_BOOT_CMD(
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"write MAC address for GETHERC",
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"[GETHERC ch0] [GETHERC ch1]\n"
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);
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#endif
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@ -190,6 +190,7 @@ int board_mmc_init(bd_t *bis)
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static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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{
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#ifdef CONFIG_DEPRECATED
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struct spi_flash *spi;
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int ret;
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@ -206,6 +207,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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return 1;
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}
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spi_flash_free(spi);
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#endif
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return 0;
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}
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@ -255,6 +257,7 @@ int board_late_init(void)
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return 0;
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}
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#ifdef CONFIG_DEPRECATED
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int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int i, ret;
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@ -318,3 +321,4 @@ U_BOOT_CMD(
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"write MAC address for GETHERC",
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"[GETHERC ch0] [GETHERC ch1]\n"
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);
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#endif
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@ -30,6 +30,7 @@ static void init_gctrl(void)
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static int init_pcie_bridge_from_spi(void *buf, size_t size)
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{
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#ifdef CONFIG_DEPRECATED
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struct spi_flash *spi;
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int ret;
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unsigned long pcie_addr;
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@ -54,6 +55,10 @@ static int init_pcie_bridge_from_spi(void *buf, size_t size)
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spi_flash_free(spi);
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return 0;
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#else
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printf("No SPI support so no PCIe support\n");
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return 1;
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#endif
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}
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static void init_pcie_bridge(void)
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@ -231,6 +236,7 @@ int board_mmc_init(bd_t *bis)
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static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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{
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#ifdef CONFIG_DEPRECATED
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struct spi_flash *spi;
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int ret;
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@ -247,6 +253,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
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return 1;
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}
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spi_flash_free(spi);
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#endif
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return 0;
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}
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@ -352,6 +359,7 @@ U_BOOT_CMD(
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"enable SH-G200 bus (disable PCIe-G200)"
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);
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#ifdef CONFIG_DEPRECATED
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int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int i, ret;
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@ -418,3 +426,4 @@ U_BOOT_CMD(
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"write MAC address for ETHERC/GETHERC",
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"[ETHERC ch0] [ETHERC ch1] [GETHERC ch0] [GETHERC ch1]\n"
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);
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#endif
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@ -6,5 +6,6 @@
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ifdef CONFIG_SPL_BUILD
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obj-y += work_92105_spl.o
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else
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obj-y += work_92105.o work_92105_display.o
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obj-y += work_92105.o
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obj-$(CONFIG_DEPRECATED) += work_92105_display.o
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endif
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@ -52,8 +52,10 @@ int board_early_init_r(void)
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gpio_request(GPO_19, "NAND_nWP");
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gpio_direction_output(GPO_19, 1);
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#ifdef CONFIG_DEPRECATED
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/* initialize display */
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work_92105_display_init();
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#endif
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return 0;
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}
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@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_DEFAULT_SPI_BUS=2
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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@ -33,13 +30,7 @@ CONFIG_DOS_PARTITION=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=40000000
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_OF_LIBFDT=y
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@ -22,7 +22,6 @@ CONFIG_CMD_IMLS=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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@ -45,7 +44,6 @@ CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_ADDR=31
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_LPC32XX_SSP=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_DEFAULT_SPI_BUS=2
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -44,15 +41,9 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_MMC_MXS=y
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_SST=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_DEFAULT_SPI_BUS=2
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -44,15 +41,9 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_MMC_MXS=y
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_SST=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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@ -21,9 +21,6 @@ CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_DEFAULT_SPI_BUS=2
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -43,15 +40,9 @@ CONFIG_ENV_IS_IN_NAND=y
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CONFIG_MMC_MXS=y
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_SST=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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@ -21,9 +21,6 @@ CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_DEFAULT_SPI_BUS=2
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -39,19 +36,12 @@ CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),512k(redundant-environment),4m(kernel),512k(fdt),8m(ramdisk),-(filesystem)"
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CONFIG_CMD_UBI=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC_MXS=y
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_SST=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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@ -18,7 +18,6 @@ CONFIG_CMD_MD5SUM=y
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# CONFIG_CMD_LOADB is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_SF=y
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# CONFIG_CMD_ECHO is not set
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SOURCE is not set
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CONFIG_CMD_EXT2=y
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CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SH_ETHER=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_SH_SPI=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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@ -17,7 +17,6 @@ CONFIG_CMD_MD5SUM=y
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# CONFIG_CMD_LOADB is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_SF=y
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# CONFIG_CMD_ECHO is not set
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SOURCE is not set
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@ -28,14 +27,9 @@ CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SH_ETHER=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_SH_SPI=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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# CONFIG_CMD_LOADB is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_SF=y
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# CONFIG_CMD_ECHO is not set
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SOURCE is not set
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CONFIG_CMD_EXT2=y
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CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SH_ETHER=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_SH_SPI=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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@ -28,7 +28,6 @@ CONFIG_CMD_EEPROM=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_LPC32XX_SSP=y
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@ -63,7 +63,6 @@
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#define CONFIG_SH_MMCIF_CLK 48000000
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/* ENV setting */
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#define CONFIG_ENV_IS_EMBEDDED
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR (0x00080000)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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@ -63,7 +63,6 @@
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#define CONFIG_SH_MMCIF_CLK 48000000
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/* ENV setting */
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#define CONFIG_ENV_IS_EMBEDDED
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR (0x00080000)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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@ -75,7 +75,6 @@
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#define SH7757LCR_PCIEBRG_SIZE (96 * 1024)
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/* ENV setting */
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#define CONFIG_ENV_IS_EMBEDDED
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR (0x00080000)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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