i2c, ppc4xx_i2c: switch to new multibus/multiadapter support

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach 2013-04-25 02:40:01 +00:00 committed by Heiko Schocher
parent 1f2ba722ac
commit 880540decf
98 changed files with 466 additions and 1026 deletions

5
README
View file

@ -1985,6 +1985,11 @@ CBFS (Coreboot Filesystem) support
- This driver adds 4 i2c buses with a fix speed from - This driver adds 4 i2c buses with a fix speed from
100000 and the slave addr 0! 100000 and the slave addr 0!
- drivers/i2c/ppc4xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_PPC4XX
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
additional defines: additional defines:
CONFIG_SYS_NUM_I2C_BUSES CONFIG_SYS_NUM_I2C_BUSES

View file

@ -52,10 +52,6 @@
/* /*
* Set default values * Set default values
*/ */
#ifndef CONFIG_SYS_I2C_SPEED
#define CONFIG_SYS_I2C_SPEED 50000
#endif
#define ONE_BILLION 1000000000 #define ONE_BILLION 1000000000
#define SDRAM0_CFG_DCE 0x80000000 #define SDRAM0_CFG_DCE 0x80000000
@ -158,7 +154,7 @@ long int spd_sdram(int(read_spd)(uint addr))
* Make sure I2C controller is initialized * Make sure I2C controller is initialized
* before continuing. * before continuing.
*/ */
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
} }
/* Make shure we are using SDRAM */ /* Make shure we are using SDRAM */

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@ -62,10 +62,6 @@
/* /*
* Set default values * Set default values
*/ */
#ifndef CONFIG_SYS_I2C_SPEED
#define CONFIG_SYS_I2C_SPEED 50000
#endif
#define ONE_BILLION 1000000000 #define ONE_BILLION 1000000000
/* /*
@ -168,7 +164,7 @@ long int spd_sdram(void) {
* Make sure I2C controller is initialized * Make sure I2C controller is initialized
* before continuing. * before continuing.
*/ */
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
/* /*
* Read the SPD information using I2C interface. Check to see if the * Read the SPD information using I2C interface. Check to see if the

View file

@ -459,8 +459,7 @@ phys_size_t initdram(int board_type)
*/ */
/* switch to correct I2C bus */ /* switch to correct I2C bus */
I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*------------------------------------------------------------------ /*------------------------------------------------------------------
* Clear out the serial presence detect buffers. * Clear out the serial presence detect buffers.

View file

@ -56,7 +56,7 @@ static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const arg
* First switch to correct I2C bus. This is I2C bus 0 * First switch to correct I2C bus. This is I2C bus 0
* for all currently available 4xx derivats. * for all currently available 4xx derivats.
*/ */
I2C_SET_BUS(0); i2c_set_bus_num(0);
#ifdef CONFIG_CMD_EEPROM #ifdef CONFIG_CMD_EEPROM
ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR, ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,

View file

@ -1041,8 +1041,7 @@ phys_size_t initdram(int board_type)
* before continuing. * before continuing.
*/ */
/* switch to correct I2C bus */ /* switch to correct I2C bus */
I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*------------------------------------------------------------------ /*------------------------------------------------------------------
* Clear out the serial presence detect buffers. * Clear out the serial presence detect buffers.

View file

@ -34,24 +34,6 @@
#define IIC_TIMEOUT 1 /* 1 second */ #define IIC_TIMEOUT 1 /* 1 second */
#if defined(CONFIG_I2C_MULTI_BUS)
#define I2C_BUS_OFFS (i2c_bus_num * 0x100)
#else
#define I2C_BUS_OFFS (0x000)
#endif /* CONFIG_I2C_MULTI_BUS */
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)
#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
#elif defined(CONFIG_440) || defined(CONFIG_405EX)
/* all remaining 440 variants */
#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
#else
/* all 405 variants */
#define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS)
#endif
struct ppc4xx_i2c { struct ppc4xx_i2c {
u8 mdbuf; u8 mdbuf;
u8 res1; u8 res1;

View file

@ -51,7 +51,7 @@ uchar pll_fs6377_regs[16] = {
*/ */
int pll_init(void) int pll_init(void)
{ {
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(0);
return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1, return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1,
(uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs)); (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));

View file

@ -385,7 +385,6 @@ int last_stage_init(void)
return 0; return 0;
} }
#if defined(CONFIG_I2C_MULTI_BUS)
/* /*
* read field strength from I2C ADC * read field strength from I2C ADC
*/ */
@ -500,7 +499,6 @@ U_BOOT_CMD(
"Initialize USB hub", "Initialize USB hub",
"" ""
); );
#endif /* CONFIG_I2C_MULTI_BUS */
#define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3
int boot_eeprom_write (unsigned dev_addr, int boot_eeprom_write (unsigned dev_addr,

View file

@ -111,7 +111,7 @@ static void kbd_init (void)
uchar val, errcd; uchar val, errcd;
int i; int i;
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(0);
gd->arch.kbd_status = 0; gd->arch.kbd_status = 0;

View file

@ -209,7 +209,7 @@ int board_early_init_f (void)
#endif #endif
/* Read Serial Presence Detect Information */ /* Read Serial Presence Detect Information */
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(0);
for (i = 0; i < 128; i++) for (i = 0; i < 128; i++)
datain[i] = 127; datain[i] = 127;
i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128); i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128);

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@ -1,510 +0,0 @@
/*
* Copyright (C) 2005 Sandburst Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by
* Travis B. Sawyer
* Sandburst Corporation.
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <asm/ppc4xx-i2c.h>
#include <i2c.h>
#include <command.h>
#include "ppc440gx_i2c.h"
#include <asm/io.h>
#ifdef CONFIG_I2C_BUS1
#define IIC_OK 0
#define IIC_NOK 1
#define IIC_NOK_LA 2 /* Lost arbitration */
#define IIC_NOK_ICT 3 /* Incomplete transfer */
#define IIC_NOK_XFRA 4 /* Transfer aborted */
#define IIC_NOK_DATA 5 /* No data in buffer */
#define IIC_NOK_TOUT 6 /* Transfer timeout */
#define IIC_TIMEOUT 1 /* 1 second */
#if defined(CONFIG_SYS_I2C_NOPROBES)
static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
#endif
static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS;
static void _i2c_bus1_reset (void)
{
int i, status;
/* Reset status register */
/* write 1 in SCMP and IRQA to clear these fields */
out_8 (IIC_STS1, 0x0A);
/* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
out_8 (IIC_EXTSTS1, 0x8F);
__asm__ volatile ("eieio");
/*
* Get current state, reset bus
* only if no transfers are pending.
*/
i = 10;
do {
/* Get status */
status = in_8 (IIC_STS1);
udelay (500); /* 500us */
i--;
} while ((status & IIC_STS_PT) && (i > 0));
/* Soft reset controller */
status = in_8 (IIC_XTCNTLSS1);
out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST));
__asm__ volatile ("eieio");
/* make sure where in initial state, data hi, clock hi */
out_8 (IIC_DIRECTCNTL1, 0xC);
for (i = 0; i < 10; i++) {
if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) {
/* clock until we get to known state */
out_8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */
udelay (100); /* 100us */
out_8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */
udelay (100); /* 100us */
} else {
break;
}
}
/* send start condition */
out_8 (IIC_DIRECTCNTL1, 0x4);
udelay (1000); /* 1ms */
/* send stop condition */
out_8 (IIC_DIRECTCNTL1, 0xC);
udelay (1000); /* 1ms */
/* Unreset controller */
out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST));
udelay (1000); /* 1ms */
}
void i2c1_init (int speed, int slaveadd)
{
sys_info_t sysInfo;
unsigned long freqOPB;
int val, divisor;
#ifdef CONFIG_SYS_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#endif
/* Handle possible failed I2C state */
/* FIXME: put this into i2c_init_board()? */
_i2c_bus1_reset ();
/* clear lo master address */
out_8 (IIC_LMADR1, 0);
/* clear hi master address */
out_8 (IIC_HMADR1, 0);
/* clear lo slave address */
out_8 (IIC_LSADR1, 0);
/* clear hi slave address */
out_8 (IIC_HSADR1, 0);
/* Clock divide Register */
/* get OPB frequency */
get_sys_info (&sysInfo);
freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv;
/* set divisor according to freqOPB */
divisor = (freqOPB - 1) / 10000000;
if (divisor == 0)
divisor = 1;
out_8 (IIC_CLKDIV1, divisor);
/* no interrupts */
out_8 (IIC_INTRMSK1, 0);
/* clear transfer count */
out_8 (IIC_XFRCNT1, 0);
/* clear extended control & stat */
/* write 1 in SRC SRS SWC SWS to clear these fields */
out_8 (IIC_XTCNTLSS1, 0xF0);
/* Mode Control Register
Flush Slave/Master data buffer */
out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
__asm__ volatile ("eieio");
val = in_8(IIC_MDCNTL1);
__asm__ volatile ("eieio");
/* Ignore General Call, slave transfers are ignored,
disable interrupts, exit unknown bus state, enable hold
SCL
100kHz normaly or FastMode for 400kHz and above
*/
val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL;
if( speed >= 400000 ){
val |= IIC_MDCNTL_FSM;
}
out_8 (IIC_MDCNTL1, val);
/* clear control reg */
out_8 (IIC_CNTL1, 0x00);
__asm__ volatile ("eieio");
}
/*
This code tries to use the features of the 405GP i2c
controller. It will transfer up to 4 bytes in one pass
on the loop. It only does out_8(lbz) to the buffer when it
is possible to do out16(lhz) transfers.
cmd_type is 0 for write 1 for read.
addr_len can take any value from 0-255, it is only limited
by the char, we could make it larger if needed. If it is
0 we skip the address write cycle.
Typical case is a Write of an addr followd by a Read. The
IBM FAQ does not cover this. On the last byte of the write
we don't set the creg CHT bit, and on the first bytes of the
read we set the RPST bit.
It does not support address only transfers, there must be
a data part. If you want to write the address yourself, put
it in the data pointer.
It does not support transfer to/from address 0.
It does not check XFRCNT.
*/
static
int i2c_transfer1(unsigned char cmd_type,
unsigned char chip,
unsigned char addr[],
unsigned char addr_len,
unsigned char data[],
unsigned short data_len )
{
unsigned char* ptr;
int reading;
int tran,cnt;
int result;
int status;
int i;
uchar creg;
if( data == 0 || data_len == 0 ){
/*Don't support data transfer of no length or to address 0*/
printf( "i2c_transfer: bad call\n" );
return IIC_NOK;
}
if( addr && addr_len ){
ptr = addr;
cnt = addr_len;
reading = 0;
}else{
ptr = data;
cnt = data_len;
reading = cmd_type;
}
/*Clear Stop Complete Bit*/
out_8(IIC_STS1,IIC_STS_SCMP);
/* Check init */
i=10;
do {
/* Get status */
status = in_8(IIC_STS1);
__asm__ volatile("eieio");
i--;
} while ((status & IIC_STS_PT) && (i>0));
if (status & IIC_STS_PT) {
result = IIC_NOK_TOUT;
return(result);
}
/*flush the Master/Slave Databuffers*/
out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB));
/*need to wait 4 OPB clocks? code below should take that long*/
/* 7-bit adressing */
out_8(IIC_HMADR1,0);
out_8(IIC_LMADR1, chip);
__asm__ volatile("eieio");
tran = 0;
result = IIC_OK;
creg = 0;
while ( tran != cnt && (result == IIC_OK)) {
int bc,j;
/* Control register =
Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start,
Transfer is a sequence of transfers
*/
creg |= IIC_CNTL_PT;
bc = (cnt - tran) > 4 ? 4 :
cnt - tran;
creg |= (bc-1)<<4;
/* if the real cmd type is write continue trans*/
if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) )
creg |= IIC_CNTL_CHT;
if (reading)
creg |= IIC_CNTL_READ;
else {
for(j=0; j<bc; j++) {
/* Set buffer */
out_8(IIC_MDBUF1,ptr[tran+j]);
__asm__ volatile("eieio");
}
}
out_8(IIC_CNTL1, creg );
__asm__ volatile("eieio");
/* Transfer is in progress
we have to wait for upto 5 bytes of data
1 byte chip address+r/w bit then bc bytes
of data.
udelay(10) is 1 bit time at 100khz
Doubled for slop. 20 is too small.
*/
i=2*5*8;
do {
/* Get status */
status = in_8(IIC_STS1);
__asm__ volatile("eieio");
udelay (10);
i--;
} while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR)
&& (i>0));
if (status & IIC_STS_ERR) {
result = IIC_NOK;
status = in_8 (IIC_EXTSTS1);
/* Lost arbitration? */
if (status & IIC_EXTSTS_LA)
result = IIC_NOK_LA;
/* Incomplete transfer? */
if (status & IIC_EXTSTS_ICT)
result = IIC_NOK_ICT;
/* Transfer aborted? */
if (status & IIC_EXTSTS_XFRA)
result = IIC_NOK_XFRA;
} else if ( status & IIC_STS_PT) {
result = IIC_NOK_TOUT;
}
/* Command is reading => get buffer */
if ((reading) && (result == IIC_OK)) {
/* Are there data in buffer */
if (status & IIC_STS_MDBS) {
/*
even if we have data we have to wait 4OPB clocks
for it to hit the front of the FIFO, after that
we can just read. We should check XFCNT here and
if the FIFO is full there is no need to wait.
*/
udelay (1);
for(j=0;j<bc;j++) {
ptr[tran+j] = in_8(IIC_MDBUF1);
__asm__ volatile("eieio");
}
} else
result = IIC_NOK_DATA;
}
creg = 0;
tran+=bc;
if( ptr == addr && tran == cnt ) {
ptr = data;
cnt = data_len;
tran = 0;
reading = cmd_type;
if( reading )
creg = IIC_CNTL_RPST;
}
}
return (result);
}
int i2c_probe1 (uchar chip)
{
uchar buf[1];
buf[0] = 0;
/*
* What is needed is to send the chip address and verify that the
* address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low).
*/
return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0);
}
int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
{
uchar xaddr[4];
int ret;
if ( alen > 4 ) {
printf ("I2C read: addr len %d not supported\n", alen);
return 1;
}
if ( alen > 0 ) {
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
xaddr[2] = (addr >> 8) & 0xFF;
xaddr[3] = addr & 0xFF;
}
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
* EEPROM chips that implement "address overflow" are ones
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
* address and the extra bits end up in the "chip address"
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
* four 256 byte chips.
*
* Note that we consider the length of the address field to
* still be one byte because the extra address bits are
* hidden in the chip address.
*/
if( alen > 0 )
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
printf( "I2c read: failed %d\n", ret);
return 1;
}
return 0;
}
int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
{
uchar xaddr[4];
if ( alen > 4 ) {
printf ("I2C write: addr len %d not supported\n", alen);
return 1;
}
if ( alen > 0 ) {
xaddr[0] = (addr >> 24) & 0xFF;
xaddr[1] = (addr >> 16) & 0xFF;
xaddr[2] = (addr >> 8) & 0xFF;
xaddr[3] = addr & 0xFF;
}
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
* EEPROM chips that implement "address overflow" are ones
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
* address and the extra bits end up in the "chip address"
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
* four 256 byte chips.
*
* Note that we consider the length of the address field to
* still be one byte because the extra address bits are
* hidden in the chip address.
*/
if( alen > 0 )
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
}
/*-----------------------------------------------------------------------
* Read a register
*/
uchar i2c_reg_read1(uchar i2c_addr, uchar reg)
{
uchar buf;
i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1);
return(buf);
}
/*-----------------------------------------------------------------------
* Write a register
*/
void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val)
{
i2c_write1(i2c_addr, reg, 1, &val, 1);
}
int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int j;
#if defined(CONFIG_SYS_I2C_NOPROBES)
int k, skip;
#endif
puts ("Valid chip addresses:");
for(j = 0; j < 128; j++) {
#if defined(CONFIG_SYS_I2C_NOPROBES)
skip = 0;
for (k = 0; k < sizeof(i2c_no_probes); k++){
if (j == i2c_no_probes[k]){
skip = 1;
break;
}
}
if (skip)
continue;
#endif
if(i2c_probe1(j) == 0) {
printf(" %02X", j);
}
}
putc ('\n');
#if defined(CONFIG_SYS_I2C_NOPROBES)
puts ("Excluded chip addresses:");
for( k = 0; k < sizeof(i2c_no_probes); k++ )
printf(" %02X", i2c_no_probes[k] );
putc ('\n');
#endif
return 0;
}
U_BOOT_CMD(
iprobe1, 1, 1, do_i2c1_probe,
"probe to discover valid I2C chip addresses",
""
);
#endif /* CONFIG_I2C_BUS1 */

View file

@ -1,60 +0,0 @@
/*
* Copyright (C) 2005 Sandburst Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Ported from i2c driver for ppc4xx by AS HARNOIS by
* Travis B. Sawyer
* Sandburst Corporation
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <asm/ppc4xx-i2c.h>
#include <i2c.h>
#ifdef CONFIG_HARD_I2C
#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
#define IIC_MDBUF1 (&i2c->mdbuf)
#define IIC_SDBUF1 (&i2c->sdbuf)
#define IIC_LMADR1 (&i2c->lmadr)
#define IIC_HMADR1 (&i2c->hmadr)
#define IIC_CNTL1 (&i2c->cntl)
#define IIC_MDCNTL1 (&i2c->mdcntl)
#define IIC_STS1 (&i2c->sts)
#define IIC_EXTSTS1 (&i2c->extsts)
#define IIC_LSADR1 (&i2c->lsadr)
#define IIC_HSADR1 (&i2c->hsadr)
#define IIC_CLKDIV1 (&i2c->clkdiv)
#define IIC_INTRMSK1 (&i2c->intrmsk)
#define IIC_XFRCNT1 (&i2c->xfrcnt)
#define IIC_XTCNTLSS1 (&i2c->xtcntlss)
#define IIC_DIRECTCNTL1 (&i2c->directcntl)
void i2c1_init (int speed, int slaveadd);
int i2c_probe1 (uchar chip);
int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
#endif /* CONFIG_HARD_I2C */

View file

@ -26,7 +26,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <spd_sdram.h> #include <spd_sdram.h>
#include <i2c.h> #include <i2c.h>
#include "ppc440gx_i2c.h"
#include "sb_common.h" #include "sb_common.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -84,7 +83,7 @@ unsigned short sbcommon_get_serial_number(void)
/* Get the board serial number from eeprom */ /* Get the board serial number from eeprom */
/* Initialize I2C */ /* Initialize I2C */
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(0);
/* Read 256 bytes in EEPROM */ /* Read 256 bytes in EEPROM */
i2c_read (0x50, 0, 1, buff, 0x100); i2c_read (0x50, 0, 1, buff, 0x100);
@ -110,85 +109,87 @@ void sbcommon_fans(void)
* Attempt to turn on 2 of the fans... * Attempt to turn on 2 of the fans...
* Need to go through the bridge * Need to go through the bridge
*/ */
i2c_set_bus_num(1);
puts ("FANS: "); puts ("FANS: ");
/* select fan4 through the bridge */ /* select fan4 through the bridge */
i2c_reg_write1(0x73, /* addr */ i2c_reg_write(0x73, /* addr */
0x00, /* reg */ 0x00, /* reg */
0x08); /* val = bus 4 */ 0x08); /* val = bus 4 */
/* Turn on FAN 4 */ /* Turn on FAN 4 */
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
1, 1,
0x80); 0x80);
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
0, 0,
0x19); 0x19);
/* Deselect bus 4 on the bridge */ /* Deselect bus 4 on the bridge */
i2c_reg_write1(0x73, i2c_reg_write(0x73,
0x00, 0x00,
0x00); 0x00);
/* select fan3 through the bridge */ /* select fan3 through the bridge */
i2c_reg_write1(0x73, /* addr */ i2c_reg_write(0x73, /* addr */
0x00, /* reg */ 0x00, /* reg */
0x04); /* val = bus 3 */ 0x04); /* val = bus 3 */
/* Turn on FAN 3 */ /* Turn on FAN 3 */
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
1, 1,
0x80); 0x80);
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
0, 0,
0x19); 0x19);
/* Deselect bus 3 on the bridge */ /* Deselect bus 3 on the bridge */
i2c_reg_write1(0x73, i2c_reg_write(0x73,
0x00, 0x00,
0x00); 0x00);
/* select fan2 through the bridge */ /* select fan2 through the bridge */
i2c_reg_write1(0x73, /* addr */ i2c_reg_write(0x73, /* addr */
0x00, /* reg */ 0x00, /* reg */
0x02); /* val = bus 4 */ 0x02); /* val = bus 4 */
/* Turn on FAN 2 */ /* Turn on FAN 2 */
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
1, 1,
0x80); 0x80);
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
0, 0,
0x19); 0x19);
/* Deselect bus 2 on the bridge */ /* Deselect bus 2 on the bridge */
i2c_reg_write1(0x73, i2c_reg_write(0x73,
0x00, 0x00,
0x00); 0x00);
/* select fan1 through the bridge */ /* select fan1 through the bridge */
i2c_reg_write1(0x73, /* addr */ i2c_reg_write(0x73, /* addr */
0x00, /* reg */ 0x00, /* reg */
0x01); /* val = bus 0 */ 0x01); /* val = bus 0 */
/* Turn on FAN 1 */ /* Turn on FAN 1 */
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
1, 1,
0x80); 0x80);
i2c_reg_write1(0x2e, i2c_reg_write(0x2e,
0, 0,
0x19); 0x19);
/* Deselect bus 1 on the bridge */ /* Deselect bus 1 on the bridge */
i2c_reg_write1(0x73, i2c_reg_write(0x73,
0x00, 0x00,
0x00); 0x00);
puts ("on\n"); puts ("on\n");
i2c_set_bus_num(0);
return; return;
@ -319,7 +320,7 @@ void board_get_enetaddr(int macaddr_idx, uchar *enet)
if (0 == macaddr_idx) { if (0 == macaddr_idx) {
/* Initialize I2C */ /* Initialize I2C */
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_set_bus_num(0);
/* Read 256 bytes in EEPROM */ /* Read 256 bytes in EEPROM */
i2c_read (0x50, 0, 1, buff, 0x100); i2c_read (0x50, 0, 1, buff, 0x100);

View file

@ -28,7 +28,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <spd_sdram.h> #include <spd_sdram.h>
#include <i2c.h> #include <i2c.h>
#include "ppc440gx_i2c.h"
/* /*
* GPIO Settings * GPIO Settings

View file

@ -40,8 +40,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
LIB = $(obj)lib$(BOARD).o LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
../common/sb_common.o
SOBJS = init.o SOBJS = init.o

View file

@ -337,11 +337,6 @@ int checkboard (void)
************************************************************************/ ************************************************************************/
int misc_init_f (void) int misc_init_f (void)
{ {
/* Turn on i2c bus 1 */
puts ("I2C1: ");
i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
puts ("ready\n");
/* Turn on fans 3 & 4 */ /* Turn on fans 3 & 4 */
sbcommon_fans(); sbcommon_fans();

View file

@ -39,8 +39,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
LIB = $(obj)lib$(BOARD).o LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
../common/sb_common.o
SOBJS = init.o SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)

View file

@ -30,7 +30,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <spd_sdram.h> #include <spd_sdram.h>
#include <i2c.h> #include <i2c.h>
#include "../common/ppc440gx_i2c.h"
#include "../common/sb_common.h" #include "../common/sb_common.h"
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \ #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
@ -305,11 +304,6 @@ int checkboard (void)
************************************************************************/ ************************************************************************/
int misc_init_f (void) int misc_init_f (void)
{ {
/* Turn on i2c bus 1 */
puts ("I2C1: ");
i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
puts ("ready\n");
/* Turn on fans */ /* Turn on fans */
sbcommon_fans(); sbcommon_fans();

View file

@ -36,7 +36,6 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
@ -45,6 +44,7 @@ COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o

View file

@ -32,27 +32,29 @@
#include <i2c.h> #include <i2c.h>
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_HARD_I2C
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_I2C_MULTI_BUS) static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr)
/*
* Initialize the bus pointer to whatever one the SPD EEPROM is on.
* Default is bus 0. This is necessary because the DDR initialization
* runs from ROM, and we can't switch buses because we can't modify
* the global variables.
*/
#ifndef CONFIG_SYS_SPD_BUS_NUM
#define CONFIG_SYS_SPD_BUS_NUM 0
#endif
static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
CONFIG_SYS_SPD_BUS_NUM;
#endif /* CONFIG_I2C_MULTI_BUS */
static void _i2c_bus_reset(void)
{ {
struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; unsigned long base;
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)
base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + (hwadapnr * 0x100);
#elif defined(CONFIG_440) || defined(CONFIG_405EX)
/* all remaining 440 variants */
base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + (hwadapnr * 0x100);
#else
/* all 405 variants */
base = 0xEF600500 + (hwadapnr * 0x100);
#endif
return (struct ppc4xx_i2c *)base;
}
static void _i2c_bus_reset(struct i2c_adapter *adap)
{
struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
int i; int i;
u8 dc; u8 dc;
@ -91,11 +93,10 @@ static void _i2c_bus_reset(void)
out_8(&i2c->xtcntlss, 0); out_8(&i2c->xtcntlss, 0);
} }
void i2c_init(int speed, int slaveaddr) static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
{ {
struct ppc4xx_i2c *i2c; struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
int val, divisor; int val, divisor;
int bus;
#ifdef CONFIG_SYS_I2C_INIT_BOARD #ifdef CONFIG_SYS_I2C_INIT_BOARD
/* /*
@ -106,67 +107,57 @@ void i2c_init(int speed, int slaveaddr)
i2c_init_board(); i2c_init_board();
#endif #endif
for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) { /* Handle possible failed I2C state */
I2C_SET_BUS(bus); /* FIXME: put this into i2c_init_board()? */
_i2c_bus_reset(adap);
/* Set i2c pointer after calling I2C_SET_BUS() */ /* clear lo master address */
i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; out_8(&i2c->lmadr, 0);
/* Handle possible failed I2C state */ /* clear hi master address */
/* FIXME: put this into i2c_init_board()? */ out_8(&i2c->hmadr, 0);
_i2c_bus_reset();
/* clear lo master address */ /* clear lo slave address */
out_8(&i2c->lmadr, 0); out_8(&i2c->lsadr, 0);
/* clear hi master address */ /* clear hi slave address */
out_8(&i2c->hmadr, 0); out_8(&i2c->hsadr, 0);
/* clear lo slave address */ /* Clock divide Register */
out_8(&i2c->lsadr, 0); /* set divisor according to freq_opb */
divisor = (get_OPB_freq() - 1) / 10000000;
if (divisor == 0)
divisor = 1;
out_8(&i2c->clkdiv, divisor);
/* clear hi slave address */ /* no interrupts */
out_8(&i2c->hsadr, 0); out_8(&i2c->intrmsk, 0);
/* Clock divide Register */ /* clear transfer count */
/* set divisor according to freq_opb */ out_8(&i2c->xfrcnt, 0);
divisor = (get_OPB_freq() - 1) / 10000000;
if (divisor == 0)
divisor = 1;
out_8(&i2c->clkdiv, divisor);
/* no interrupts */ /* clear extended control & stat */
out_8(&i2c->intrmsk, 0); /* write 1 in SRC SRS SWC SWS to clear these fields */
out_8(&i2c->xtcntlss, 0xF0);
/* clear transfer count */ /* Mode Control Register
out_8(&i2c->xfrcnt, 0); Flush Slave/Master data buffer */
out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
/* clear extended control & stat */ val = in_8(&i2c->mdcntl);
/* write 1 in SRC SRS SWC SWS to clear these fields */
out_8(&i2c->xtcntlss, 0xF0);
/* Mode Control Register /* Ignore General Call, slave transfers are ignored,
Flush Slave/Master data buffer */ * disable interrupts, exit unknown bus state, enable hold
out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB); * SCL 100kHz normaly or FastMode for 400kHz and above
*/
val = in_8(&i2c->mdcntl); val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
if (speed >= 400000)
val |= IIC_MDCNTL_FSM;
out_8(&i2c->mdcntl, val);
/* Ignore General Call, slave transfers are ignored, /* clear control reg */
* disable interrupts, exit unknown bus state, enable hold out_8(&i2c->cntl, 0x00);
* SCL 100kHz normaly or FastMode for 400kHz and above
*/
val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
if (speed >= 400000)
val |= IIC_MDCNTL_FSM;
out_8(&i2c->mdcntl, val);
/* clear control reg */
out_8(&i2c->cntl, 0x00);
}
/* set to SPD bus as default bus upon powerup */
I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
} }
/* /*
@ -194,14 +185,15 @@ void i2c_init(int speed, int slaveaddr)
* *
* It does not check XFRCNT. * It does not check XFRCNT.
*/ */
static int i2c_transfer(unsigned char cmd_type, static int _i2c_transfer(struct i2c_adapter *adap,
unsigned char cmd_type,
unsigned char chip, unsigned char chip,
unsigned char addr[], unsigned char addr[],
unsigned char addr_len, unsigned char addr_len,
unsigned char data[], unsigned char data[],
unsigned short data_len) unsigned short data_len)
{ {
struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
u8 *ptr; u8 *ptr;
int reading; int reading;
int tran, cnt; int tran, cnt;
@ -345,7 +337,7 @@ static int i2c_transfer(unsigned char cmd_type,
return result; return result;
} }
int i2c_probe(uchar chip) static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip)
{ {
uchar buf[1]; uchar buf[1];
@ -356,11 +348,11 @@ int i2c_probe(uchar chip)
* address was <ACK>ed (i.e. there was a chip at that address which * address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low). * drove the data line low).
*/ */
return (i2c_transfer(1, chip << 1, 0, 0, buf, 1) != 0); return (_i2c_transfer(adap, 1, chip << 1, 0, 0, buf, 1) != 0);
} }
static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr,
int len, int read) int alen, uchar *buffer, int len, int read)
{ {
uchar xaddr[4]; uchar xaddr[4];
int ret; int ret;
@ -394,43 +386,50 @@ static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
chip |= ((addr >> (alen * 8)) & chip |= ((addr >> (alen * 8)) &
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif #endif
if ((ret = i2c_transfer(read, chip << 1, &xaddr[4 - alen], alen, ret = _i2c_transfer(adap, read, chip << 1, &xaddr[4 - alen], alen,
buffer, len)) != 0) { buffer, len);
if (ret) {
printf("I2C %s: failed %d\n", read ? "read" : "write", ret); printf("I2C %s: failed %d\n", read ? "read" : "write", ret);
return 1; return 1;
} }
return 0; return 0;
} }
int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len) static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
int alen, uchar *buffer, int len)
{ {
return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 1); return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 1);
} }
int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
int alen, uchar *buffer, int len)
{ {
return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 0); return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
} }
#if defined(CONFIG_I2C_MULTI_BUS) static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap,
/* unsigned int speed)
* Functions for multiple I2C bus handling
*/
unsigned int i2c_get_bus_num(void)
{ {
return i2c_bus_num; if (speed != adap->speed)
}
int i2c_set_bus_num(unsigned int bus)
{
if (bus >= CONFIG_SYS_MAX_I2C_BUS)
return -1; return -1;
return speed;
i2c_bus_num = bus;
return 0;
} }
#endif /* CONFIG_I2C_MULTI_BUS */
#endif /* CONFIG_HARD_I2C */ /*
* Register ppc4xx i2c adapters
*/
#ifdef CONFIG_SYS_I2C_PPC4XX_CH0
U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_0, ppc4xx_i2c_init, ppc4xx_i2c_probe,
ppc4xx_i2c_read, ppc4xx_i2c_write,
ppc4xx_i2c_set_bus_speed,
CONFIG_SYS_I2C_PPC4XX_SPEED_0,
CONFIG_SYS_I2C_PPC4XX_SLAVE_0, 0)
#endif
#ifdef CONFIG_SYS_I2C_PPC4XX_CH1
U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_1, ppc4xx_i2c_init, ppc4xx_i2c_probe,
ppc4xx_i2c_read, ppc4xx_i2c_write,
ppc4xx_i2c_set_bus_speed,
CONFIG_SYS_I2C_PPC4XX_SPEED_1,
CONFIG_SYS_I2C_PPC4XX_SLAVE_1, 1)
#endif

View file

@ -306,10 +306,11 @@
/* /*
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

View file

@ -247,10 +247,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

View file

@ -180,14 +180,14 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C
#define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */ /* mask of address bits that overflow into the "EEPROM chip address" */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07

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@ -402,10 +402,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -226,10 +226,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -211,10 +211,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -260,10 +260,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -287,10 +287,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -263,10 +263,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC32) for environment * I2C EEPROM (CAT24WC32) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */

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@ -282,10 +282,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -196,10 +196,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -76,11 +76,12 @@
#define CONFIG_SERVERIP 10.0.0.1 #define CONFIG_SERVERIP 10.0.0.1
#define CONFIG_ETHADDR 00:40:a6:80:14:5 #define CONFIG_ETHADDR 00:40:a6:80:14:5
*/ */
#define CONFIG_HARD_I2C 1 /* hardware support for i2c */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SDRAM_BANK0 1 #define CONFIG_SDRAM_BANK0 1
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_IDENT_STRING "Cray L1" #define CONFIG_IDENT_STRING "Cray L1"

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@ -178,10 +178,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

View file

@ -197,10 +197,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -170,18 +170,20 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_I2C_MULTI_BUS 1 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_PPC4XX_CH1
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SPD_BUS_NUM 0
#define IIC1_MCP3021_ADDR 0x4d #define IIC1_MCP3021_ADDR 0x4d
#define IIC1_USB2507_ADDR 0x2c #define IIC1_USB2507_ADDR 0x2c
#ifdef CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_NOPROBES { {1, IIC1_USB2507_ADDR} }
#define CONFIG_SYS_I2C_NOPROBES {{1, IIC1_USB2507_ADDR}}
#endif
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2

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@ -298,10 +298,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
/* CAT24WC08/16... */ /* CAT24WC08/16... */

View file

@ -334,14 +334,15 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_PPC4XX_CH0
#if 0 /* test-only */ #if 0 /* test-only */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#else #else
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#endif #endif
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
#define CONFIG_SYS_EEPROM_WREN 1 #define CONFIG_SYS_EEPROM_WREN 1

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@ -246,10 +246,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

View file

@ -210,10 +210,11 @@
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------

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@ -133,13 +133,15 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */ #define CONFIG_SYS_I2C_PPC4XX_CH1
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Environment * Environment

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@ -195,13 +195,15 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */ #define CONFIG_SYS_I2C_PPC4XX_CH1
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Environment * Environment

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@ -98,10 +98,11 @@
* The Atmel EEPROM uses 16Bit addressing. * The Atmel EEPROM uses 16Bit addressing.
***************************************************************/ ***************************************************************/
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */

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@ -217,10 +217,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -213,10 +213,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -209,10 +209,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -87,10 +87,11 @@
* EEPROM of the SDRAM * EEPROM of the SDRAM
* The Atmel EEPROM uses 16Bit addressing. * The Atmel EEPROM uses 16Bit addressing.
***************************************************************/ ***************************************************************/
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2

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@ -281,10 +281,11 @@
/* /*
* I2C EEPROM (24WC16) for environment * I2C EEPROM (24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */
#define CONFIG_SYS_EEPROM_WREN 1 #define CONFIG_SYS_EEPROM_WREN 1

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@ -239,10 +239,11 @@
/* /*
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24W16 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24W16 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -217,10 +217,11 @@
/* /*
* I2C EEPROM (24W16) for environment * I2C EEPROM (24W16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24W16 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24W16 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -225,12 +225,14 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_I2C_MULTI_BUS 1 #define CONFIG_SYS_I2C_PPC4XX_CH1
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS

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@ -419,10 +419,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -280,10 +280,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
#define CONFIG_SYS_EEPROM_WREN 1 #define CONFIG_SYS_EEPROM_WREN 1

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@ -205,10 +205,11 @@
/* /*
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -279,10 +279,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment * I2C EEPROM (CAT24WC08) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -286,10 +286,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (ATMEL 24C04N) * I2C EEPROM (ATMEL 24C04N)
*/ */
#define CONFIG_HARD_I2C 1 /* Hardware assisted I2C */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -244,10 +244,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment * I2C EEPROM (CAT24WC16) for environment
*/ */
#define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -206,7 +206,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

View file

@ -121,11 +121,12 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C EEPROM (PCF8594C) * I2C EEPROM (PCF8594C)

View file

@ -42,9 +42,10 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
/* /*
* Ethernet/EMAC/PHY * Ethernet/EMAC/PHY

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@ -222,7 +222,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -122,7 +122,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1

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@ -134,9 +134,9 @@
* I2C stuff * I2C stuff
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
#if defined(CONFIG_CMD_EEPROM) #if defined(CONFIG_CMD_EEPROM)

View file

@ -329,7 +329,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -175,10 +175,11 @@
* I2C configuration * I2C configuration
* *
*/ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
/* /*
* MII PHY configuration * MII PHY configuration

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@ -174,10 +174,11 @@
* I2C configuration * I2C configuration
* *
*/ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
/* /*
* MII PHY configuration * MII PHY configuration

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@ -114,7 +114,7 @@
/* /*
* I2C stuff * I2C stuff
*/ */
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
/* Temp sensor/hwmon/dtt */ /* Temp sensor/hwmon/dtt */
#define CONFIG_DTT_LM63 1 /* National LM63 */ #define CONFIG_DTT_LM63 1 /* National LM63 */

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@ -107,7 +107,7 @@
/* /*
* I2C stuff * I2C stuff
*/ */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address*/ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
/* /*
* FLASH organization * FLASH organization

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@ -138,7 +138,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -145,7 +145,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
/* /*
* Default environment variables * Default environment variables

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@ -120,9 +120,8 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS

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@ -228,7 +228,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -114,7 +114,7 @@
/* /*
* I2C stuff * I2C stuff
*/ */
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
/* Temp sensor/hwmon/dtt */ /* Temp sensor/hwmon/dtt */
#define CONFIG_DTT_LM63 1 /* National LM63 */ #define CONFIG_DTT_LM63 1 /* National LM63 */

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@ -340,7 +340,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_PCA9698 1 /* NXP PCA9698 */ #define CONFIG_PCA9698 1 /* NXP PCA9698 */

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@ -110,11 +110,11 @@
/* /*
* I2C stuff * I2C stuff
*/ */
#undef CONFIG_HARD_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SOFT_SPEED 400000 #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
/* /*
* Software (bit-bang) I2C driver configuration * Software (bit-bang) I2C driver configuration

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@ -119,9 +119,8 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
#define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_BOOTPROM_ADDR 0x50

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@ -385,7 +385,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */

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@ -155,10 +155,11 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -134,7 +134,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -298,10 +298,11 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* RTC */ #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* RTC */
#define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52 /* EEPROM (CPU Modul) */ #define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52 /* EEPROM (CPU Modul) */

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@ -201,7 +201,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */

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@ -117,7 +117,7 @@
/* /*
* I2C stuff * I2C stuff
*/ */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
/* RTC */ /* RTC */
#define CONFIG_RTC_DS1337 #define CONFIG_RTC_DS1337

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@ -151,7 +151,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -97,11 +97,12 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C RTC * I2C RTC

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@ -139,10 +139,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa4>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa4>>1)
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1

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@ -152,10 +152,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */

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@ -110,13 +110,13 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_BOOTPROM_ADDR 0x50
#define IIC0_ALT_BOOTPROM_ADDR 0x54 #define IIC0_ALT_BOOTPROM_ADDR 0x54
/* Don't probe these addrs */ /* Don't probe these addrs */
#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} #define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */

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@ -168,10 +168,11 @@
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* PCI stuff * PCI stuff

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@ -246,15 +246,16 @@
* IIC stuff * IIC stuff
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
*/ */
#define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_PPC4XX_CH0
#define I2C_INIT #define I2C_INIT
#define I2C_ACTIVE 0 #define I2C_ACTIVE 0
#define I2C_TRISTATE 0 #define I2C_TRISTATE 0
#define CONFIG_SYS_I2C_SPEED 100000 /* use the standard 100kHz speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F /* mask valid bits */ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */
#define CONFIG_RTC_DS1337 #define CONFIG_RTC_DS1337
#define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_SYS_I2C_RTC_ADDR 0x68

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@ -232,7 +232,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -319,7 +319,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -138,9 +138,9 @@
* I2C stuff * I2C stuff
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */

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@ -133,7 +133,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#undef CONFIG_SYS_I2C_MULTI_EEPROMS #undef CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50

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@ -95,7 +95,7 @@
* I2C stuff * I2C stuff
*----------------------------------------------------------------------- *-----------------------------------------------------------------------
*/ */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -145,11 +145,11 @@ extern void out32(unsigned int, unsigned long);
/* /*
* I2C * I2C
*/ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7f #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
/* I2C EEPROM */ /* I2C EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50

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@ -137,7 +137,7 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)

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@ -120,13 +120,13 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_BOOTPROM_ADDR 0x50
#define IIC0_ALT_BOOTPROM_ADDR 0x54 #define IIC0_ALT_BOOTPROM_ADDR 0x54
/* Don't probe these addrs */ /* Don't probe these addrs */
#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} #define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
/* #if defined(CONFIG_CMD_EEPROM) */ /* #if defined(CONFIG_CMD_EEPROM) */
/* #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */ /* #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */

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@ -168,10 +168,11 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C
*----------------------------------------------------------------------*/ *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
/* these are for the ST M24C02 2kbit serial i2c eeprom */ /* these are for the ST M24C02 2kbit serial i2c eeprom */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */