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ARM: cache: Fix incorrect bitwise operation

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The loop implemented in the code is supposed to check whether the
PL310 operation register has any bit from the mask set. Currently,
the code checks whether the PL310 operation register has any bit
set AND whether the mask is non-zero, which is incorrect. Fix the
conditional.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 93bc21930a ("armv7: add PL310 support to u-boot")
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Marek Vasut 2019-02-19 01:43:51 +01:00 committed by Tom Rini
parent b8b88e6aff
commit 86dc480d73
1 changed files with 1 additions and 1 deletions
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2
arch/arm/lib/cache-pl310.c
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@ -33,7 +33,7 @@ static void pl310_background_op_all_ways(u32 *op_reg)
/* Invalidate all ways */
writel(way_mask, op_reg);
/* Wait for all ways to be invalidated */
while (readl(op_reg) && way_mask)
while (readl(op_reg) & way_mask)
;
pl310_cache_sync();
}