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Kirkwood: openrd_base: Added SATA support
This patch enables mvsata driver and related filesystem support. The patch is tested for ide reset and ext2ls operation for a disk drive connected on SATA port0. This patch depends upon the patche-series http://lists.denx.de/pipermail/u-boot/2010-August/074908.html Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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@ -103,6 +103,7 @@
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_IDE
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/*
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* NAND configuration
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@ -204,6 +205,36 @@
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#define CONFIG_SUPPORT_VFAT
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#endif /* CONFIG_CMD_USB */
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/*
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* IDe Support on SATA port0
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*/
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#ifdef CONFIG_CMD_IDE
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#define __io
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#define CONFIG_CMD_EXT2
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#define CONFIG_MVSATA_IDE
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#define CONFIG_IDE_PREINIT
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#define CONFIG_MVSATA_IDE_USE_PORT1
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/* Needs byte-swapping for ATA data register */
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#define CONFIG_IDE_SWAP_IO
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/* Data, registers and alternate blocks are at the same offset */
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#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
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/* Each 8-bit ATA register is aligned to a 4-bytes address */
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#define CONFIG_SYS_ATA_STRIDE 4
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/* Controller supports 48-bits LBA addressing */
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#define CONFIG_LBA48
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/* CONFIG_CMD_IDE requires some #defines for ATA registers */
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#define CONFIG_SYS_IDE_MAXBUS 2
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#define CONFIG_SYS_IDE_MAXDEVICE 2
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/* ATA registers base is at SATA controller base */
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#define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE
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/* ATA bus 0 is Kirkwood port 0 on openrd */
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#define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET
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/* ATA bus 1 is Kirkwood port 1 on openrd */
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#define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET
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#endif /* CONFIG_CMD_IDE */
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/*
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* File system
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*/
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