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https://github.com/AsahiLinux/u-boot
synced 2024-12-01 08:59:33 +00:00
Renamed cpu/i386/reset.S to resetvec.S
Brings i386 in line with other CPUs with a reset vector and frees up reset.c for CPU reset functions Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This commit is contained in:
parent
a3f4c123f5
commit
85ffbbd519
6 changed files with 12 additions and 12 deletions
2
Makefile
2
Makefile
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@ -197,7 +197,7 @@ include $(TOPDIR)/config.mk
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OBJS = cpu/$(CPU)/start.o
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OBJS = cpu/$(CPU)/start.o
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ifeq ($(CPU),i386)
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ifeq ($(CPU),i386)
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OBJS += cpu/$(CPU)/start16.o
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OBJS += cpu/$(CPU)/start16.o
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OBJS += cpu/$(CPU)/reset.o
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OBJS += cpu/$(CPU)/resetvec.o
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endif
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endif
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ifeq ($(CPU),ppc4xx)
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ifeq ($(CPU),ppc4xx)
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OBJS += cpu/$(CPU)/resetvec.o
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OBJS += cpu/$(CPU)/resetvec.o
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@ -75,7 +75,7 @@ SECTIONS
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* The fe00 and ff00 offsets of the start32 and start16
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* The fe00 and ff00 offsets of the start32 and start16
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* segments are arbitrary, the just have to be mapped
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* segments are arbitrary, the just have to be mapped
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* at reset and the code have to fit.
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* at reset and the code have to fit.
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* The fff0 offset of reset is important, however.
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* The fff0 offset of resetvec is important, however.
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*/
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*/
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. = 0xfffffe00;
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. = 0xfffffe00;
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@ -85,6 +85,6 @@ SECTIONS
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.start16 : AT (0x3807f800) { *(.start16); }
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.start16 : AT (0x3807f800) { *(.start16); }
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. = 0xfff0;
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. = 0xfff0;
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.reset : AT (0x3807fff0) { *(.reset); }
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.resetvec : AT (0x3807fff0) { *(.resetvec); }
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_i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
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_i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
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}
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}
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@ -75,7 +75,7 @@ SECTIONS
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* The fe00 and ff00 offsets of the start32 and start16
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* The fe00 and ff00 offsets of the start32 and start16
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* segments are arbitrary, the just have to be mapped
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* segments are arbitrary, the just have to be mapped
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* at reset and the code have to fit.
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* at reset and the code have to fit.
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* The fff0 offset of reset is important, however.
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* The fff0 offset of resetvec is important, however.
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*/
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*/
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@ -86,6 +86,6 @@ SECTIONS
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.start16 : AT (0x387fff00) { *(.start16); }
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.start16 : AT (0x387fff00) { *(.start16); }
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. = 0xfff0;
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. = 0xfff0;
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.reset : AT (0x387ffff0) { *(.reset); }
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.resetvec : AT (0x387ffff0) { *(.resetvec); }
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_i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
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_i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
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}
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}
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@ -76,7 +76,7 @@ SECTIONS
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* The fe00 and ff00 offsets of the start32 and start16
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* The fe00 and ff00 offsets of the start32 and start16
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* segments are arbitrary, the just have to be mapped
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* segments are arbitrary, the just have to be mapped
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* at reset and the code have to fit.
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* at reset and the code have to fit.
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* The fff0 offset of reset is important, however.
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* The fff0 offset of resetvec is important, however.
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*/
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*/
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@ -87,6 +87,6 @@ SECTIONS
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.start16 : AT (0x387fff00) { *(.start16); }
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.start16 : AT (0x387fff00) { *(.start16); }
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. = 0xfff0;
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. = 0xfff0;
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.reset : AT (0x387ffff0) { *(.reset); }
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.resetvec : AT (0x387ffff0) { *(.resetvec); }
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_i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
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_i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
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}
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}
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@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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LIB = $(obj)lib$(CPU).a
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START = start.o start16.o reset.o
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START = start.o start16.o resetvec.o
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COBJS = serial.o interrupts.o cpu.o timer.o sc520.o
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COBJS = serial.o interrupts.o cpu.o timer.o sc520.o
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SOBJS = sc520_asm.o
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SOBJS = sc520_asm.o
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@ -26,7 +26,7 @@
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.extern start16
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.extern start16
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.section .reset, "ax"
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.section .resetvec, "ax"
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.code16
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.code16
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reset_vector:
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reset_vector:
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cli
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cli
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