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mx25: Clean up lowlevel_init
Clean up mx25 lowlevel_init: - Add comments. - Do not use write32 repeatedly with the same value in order not to increase code size. - Make register values configurable. - Use macro parameters with default values instead of literal constants. - Use defined macros instead of duplicating code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Matthias Weisser <weisserm@arcor.de>
This commit is contained in:
Benoît Thébaudeau
Tom Rini
parent
9e0081d573
commit
85d993cef9
2 changed files with 68 additions and 53 deletions
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@ -32,32 +32,75 @@
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#include <asm/arch/imx-regs.h>
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#include <generated/asm-offsets.h>
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#include <asm/macro.h>
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.macro init_aips
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write32 IMX_AIPS1_BASE + AIPS_MPR_0_7, 0x77777777
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write32 IMX_AIPS1_BASE + AIPS_MPR_8_15, 0x77777777
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write32 IMX_AIPS2_BASE + AIPS_MPR_0_7, 0x77777777
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write32 IMX_AIPS2_BASE + AIPS_MPR_8_15, 0x77777777
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/*
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* AIPS setup - Only setup MPROTx registers.
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* The PACR default values are good.
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*
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* Default argument values:
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* - MPR: Set all MPROTx to be non-bufferable, trusted for R/W, not forced to
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* user-mode.
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*/
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.macro init_aips mpr=0x77777777
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ldr r0, =IMX_AIPS1_BASE
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ldr r1, =\mpr
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str r1, [r0, #AIPS_MPR_0_7]
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str r1, [r0, #AIPS_MPR_8_15]
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ldr r2, =IMX_AIPS2_BASE
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str r1, [r2, #AIPS_MPR_0_7]
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str r1, [r2, #AIPS_MPR_8_15]
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.endm
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.macro init_max
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write32 IMX_MAX_BASE + MAX_MPR0, 0x43210
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write32 IMX_MAX_BASE + MAX_MPR1, 0x43210
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write32 IMX_MAX_BASE + MAX_MPR2, 0x43210
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write32 IMX_MAX_BASE + MAX_MPR3, 0x43210
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write32 IMX_MAX_BASE + MAX_MPR4, 0x43210
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/*
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* MAX (Multi-Layer AHB Crossbar Switch) setup
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*
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* Default argument values:
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* - MPR: priority is IAHB > DAHB > USBOTG > RTIC > eSDHC2/SDMA
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* - SGPCR: always park on last master
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* - MGPCR: restore default values
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*/
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.macro init_max mpr=0x00043210, sgpcr=0x00000010, mgpcr=0x00000000
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ldr r0, =IMX_MAX_BASE
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ldr r1, =\mpr
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str r1, [r0, #MAX_MPR0] /* for S0 */
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str r1, [r0, #MAX_MPR1] /* for S1 */
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str r1, [r0, #MAX_MPR2] /* for S2 */
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str r1, [r0, #MAX_MPR3] /* for S3 */
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str r1, [r0, #MAX_MPR4] /* for S4 */
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ldr r1, =\sgpcr
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str r1, [r0, #MAX_SGPCR0] /* for S0 */
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str r1, [r0, #MAX_SGPCR1] /* for S1 */
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str r1, [r0, #MAX_SGPCR2] /* for S2 */
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str r1, [r0, #MAX_SGPCR3] /* for S3 */
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str r1, [r0, #MAX_SGPCR4] /* for S4 */
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ldr r1, =\mgpcr
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str r1, [r0, #MAX_MGPCR0] /* for M0 */
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str r1, [r0, #MAX_MGPCR1] /* for M1 */
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str r1, [r0, #MAX_MGPCR2] /* for M2 */
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str r1, [r0, #MAX_MGPCR3] /* for M3 */
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str r1, [r0, #MAX_MGPCR4] /* for M4 */
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.endm
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write32 IMX_MAX_BASE + MAX_SGPCR0, 0x10
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write32 IMX_MAX_BASE + MAX_SGPCR1, 0x10
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write32 IMX_MAX_BASE + MAX_SGPCR2, 0x10
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write32 IMX_MAX_BASE + MAX_SGPCR3, 0x10
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write32 IMX_MAX_BASE + MAX_SGPCR4, 0x10
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write32 IMX_MAX_BASE + MAX_MGPCR0, 0x0
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write32 IMX_MAX_BASE + MAX_MGPCR1, 0x0
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write32 IMX_MAX_BASE + MAX_MGPCR2, 0x0
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write32 IMX_MAX_BASE + MAX_MGPCR3, 0x0
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write32 IMX_MAX_BASE + MAX_MGPCR4, 0x0
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/*
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* M3IF setup
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*
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* Default argument values:
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* - CTL:
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* MRRP[0] = LCDC on priority list (1 << 0) = 0x00000001
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* MRRP[1] = MAX1 not on priority list (0 << 1) = 0x00000000
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* MRRP[2] = MAX0 not on priority list (0 << 2) = 0x00000000
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* MRRP[3] = USBH not on priority list (0 << 3) = 0x00000000
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* MRRP[4] = SDMA not on priority list (0 << 4) = 0x00000000
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* MRRP[5] = eSDHC1/ATA/FEC not on priority list (0 << 5) = 0x00000000
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* MRRP[6] = LCDC/SLCDC/MAX2 not on priority list (0 << 6) = 0x00000000
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* MRRP[7] = CSI not on priority list (0 << 7) = 0x00000000
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* ------------
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* 0x00000001
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*/
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.macro init_m3if ctl=0x00000001
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/* M3IF Control Register (M3IFCTL) */
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write32 IMX_M3IF_CTRL_BASE, \ctl
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.endm
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#endif /* __ASSEMBLY__ */
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@ -22,37 +22,7 @@
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*/
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#include <asm/macro.h>
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.macro init_aips
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write32 0x43f00000, 0x77777777
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write32 0x43f00004, 0x77777777
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write32 0x43f00000, 0x77777777
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write32 0x53f00004, 0x77777777
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.endm
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.macro init_max
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write32 0x43f04000, 0x43210
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write32 0x43f04100, 0x43210
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write32 0x43f04200, 0x43210
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write32 0x43f04300, 0x43210
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write32 0x43f04400, 0x43210
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write32 0x43f04010, 0x10
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write32 0x43f04110, 0x10
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write32 0x43f04210, 0x10
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write32 0x43f04310, 0x10
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write32 0x43f04410, 0x10
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write32 0x43f04800, 0x0
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write32 0x43f04900, 0x0
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write32 0x43f04a00, 0x0
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write32 0x43f04b00, 0x0
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write32 0x43f04c00, 0x0
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.endm
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.macro init_m3if
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write32 0xb8003000, 0x1
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.endm
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#include <asm/arch/macro.h>
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.macro init_clocks
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/*
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@ -64,6 +34,8 @@
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* 0x00600000 makes CLKO parent clk the USB clk
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*/
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write32 0x53f80064, 0x45600000
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/* CCTL: ARM = 399 MHz, AHB = 133 MHz */
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write32 0x53f80008, 0x20034000
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/*
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