mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
Merge with /home/mk/git/u-boot-generic_ohci#generic_ohci
This commit is contained in:
Wolfgang Denk
Wolfgang Denk
commit
83dc830b16
16 changed files with 162 additions and 38 deletions
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@ -34,7 +34,7 @@
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#ifdef CONFIG_AUTO_UPDATE
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#ifndef CONFIG_USB_OHCI
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#ifndef CONFIG_USB_OHCI_NEW
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#error "must define CONFIG_USB_OHCI"
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#endif
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@ -23,7 +23,7 @@
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#include <common.h>
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#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
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# ifdef CONFIG_AT91RM9200
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#include <asm/arch/hardware.h>
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@ -23,7 +23,7 @@
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#include <common.h>
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#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
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# if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
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#if defined(CONFIG_S3C2400)
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@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a
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START = start.o
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SOBJS = io.o firmware_sc_task_bestcomm.impl.o firmware_sc_task.impl.o
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COBJS = i2c.o traps.o cpu.o cpu_init.o fec.o ide.o interrupts.o \
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loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o
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loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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@ -27,12 +27,11 @@ LIB = $(obj)lib$(CPU).a
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START = start.o resetvec.o kgdb.o
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SOBJS = dcr.o
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COBJS = 405gp_pci.o 4xx_enet.o \
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COBJS = 405gp_pci.o 440spe_pcie.o 4xx_enet.o \
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bedbug_405.o commproc.o \
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cpu.o cpu_init.o i2c.o interrupts.o \
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miiphy.o ndfc.o sdram.o serial.o \
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spd_sdram.o speed.o traps.o usb_ohci.o usbdev.o \
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440spe_pcie.o
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spd_sdram.o speed.o traps.o usb_ohci.o usbdev.o usb.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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@ -23,7 +23,7 @@
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#include <common.h>
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#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
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# ifdef CONFIG_CPU_MONAHANS
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#include <asm/arch/pxa-regs.h>
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43
doc/README.generic_usb_ohci
Normal file
43
doc/README.generic_usb_ohci
Normal file
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@ -0,0 +1,43 @@
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Notes on the the generic USB-OHCI driver
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========================================
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This driver (drivers/usb_ohci.[ch]) is the result of the merge of
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various existing OHCI drivers that were basically identical beside
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cpu/board dependant initalization. This initalization has been moved
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into cpu/board directories and are called via the hooks below.
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Configuration options
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----------------------
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CONFIG_USB_OHCI_NEW: enable the new OHCI driver
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CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
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- extern int usb_board_init(void);
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- extern int usb_board_stop(void);
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- extern int usb_cpu_init_fail(void);
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CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
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- extern int usb_cpu_init(void);
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- extern int usb_cpu_stop(void);
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- extern int usb_cpu_init_fail(void);
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CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers
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CFG_USB_OHCI_SLOT_NAME: slot name
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CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub.
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Endianness issues
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------------------
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The LITTLEENDIAN #define determines if the 'swap_16' and 'swap_32'
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macros do byte swapping or not. But some cpus OHCI-controllers such as
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ppc4xx and mpc5xxx operate in little endian mode, so some extra ifdefs
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were necessary to make this work.
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@ -43,8 +43,9 @@
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#include <common.h>
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/* #include <pci.h> no PCI on the S3C24X0 */
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#ifdef CONFIG_USB_OHCI
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#ifdef CONFIG_USB_OHCI_NEW
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/* mk: are these really required? */
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#if defined(CONFIG_S3C2400)
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# include <s3c2400.h>
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#elif defined(CONFIG_S3C2410)
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@ -53,21 +54,28 @@
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# include <asm/arch/hardware.h>
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#elif defined(CONFIG_CPU_MONAHANS)
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# include <asm/arch/pxa-regs.h>
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#elif defined(CONFIG_MPC5200)
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# include <mpc5xxx.h>
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#endif
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#include <malloc.h>
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#include <usb.h>
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#include "usb_ohci.h"
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#undef S3C24X0_merge
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#define S3C24X0_merge
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#if defined(CONFIG_ARM920T) || \
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defined(CONFIG_S3C2400) || \
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defined(CONFIG_S3C2410)
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defined(CONFIG_S3C2410) || \
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defined(CONFIG_440EP) || \
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defined(CONFIG_MPC5200)
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# define OHCI_USE_NPS /* force NoPowerSwitching mode */
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#endif
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#undef OHCI_VERBOSE_DEBUG /* not always helpful */
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#undef DEBUG
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#undef SHOW_INFO
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#undef OHCI_FILL_TRACE
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT \
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@ -92,8 +100,13 @@
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#define info(format, arg...) do {} while(0)
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#endif
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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# define m16_swap(x) (x)
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# define m32_swap(x) (x)
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#else
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# define m16_swap(x) swap_16(x)
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# define m32_swap(x) swap_32(x)
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#endif
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/* global ohci_t */
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static ohci_t gohci;
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@ -520,7 +533,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
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if (ohci->ed_controltail == NULL) {
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writel (ed, &ohci->regs->ed_controlhead);
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} else {
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ohci->ed_controltail->hwNextED = m32_swap (ed);
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ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
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}
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ed->ed_prev = ohci->ed_controltail;
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if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
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@ -536,7 +549,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
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if (ohci->ed_bulktail == NULL) {
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writel (ed, &ohci->regs->ed_bulkhead);
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} else {
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ohci->ed_bulktail->hwNextED = m32_swap (ed);
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ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
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}
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ed->ed_prev = ohci->ed_bulktail;
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if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
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@ -557,8 +570,10 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
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* the link from the ed still points to another operational ed or 0
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* so the HC can eventually finish the processing of the unlinked ed */
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static int ep_unlink (ohci_t *ohci, ed_t *ed)
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static int ep_unlink (ohci_t *ohci, ed_t *edi)
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{
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volatile ed_t *ed = edi;
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ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
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switch (ed->type) {
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@ -630,7 +645,7 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
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ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
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/* dummy td; end of td list for ed */
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td = td_alloc (usb_dev);
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ed->hwTailP = m32_swap (td);
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ed->hwTailP = m32_swap ((unsigned long)td);
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ed->hwHeadP = ed->hwTailP;
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ed->state = ED_UNLINK;
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ed->type = usb_pipetype (pipe);
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@ -688,12 +703,12 @@ static void td_fill (ohci_t *ohci, unsigned int info,
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data = 0;
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td->hwINFO = m32_swap (info);
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td->hwCBP = m32_swap (data);
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td->hwCBP = m32_swap ((unsigned long)data);
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if (data)
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td->hwBE = m32_swap (data + len - 1);
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td->hwBE = m32_swap ((unsigned long)(data + len - 1));
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else
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td->hwBE = 0;
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td->hwNextTD = m32_swap (td_pt);
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td->hwNextTD = m32_swap ((unsigned long)td_pt);
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#ifndef S3C24X0_merge
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td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
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#endif
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@ -825,6 +840,9 @@ static td_t * dl_reverse_done_list (ohci_t *ohci)
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} else
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td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
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}
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#ifdef CONFIG_MPC5200
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td_list->hwNextTD = 0;
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#endif
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}
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td_list->next_dl_td = td_rev;
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@ -867,7 +885,12 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list)
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/* see if this done list makes for all TD's of current URB,
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* and mark the URB finished if so */
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if (++(lurb_priv->td_cnt) == lurb_priv->length) {
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#if 1
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if ((ed->state & (ED_OPER | ED_UNLINK)) &&
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(lurb_priv->state != URB_DEL))
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#else
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if ((ed->state & (ED_OPER | ED_UNLINK)))
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#endif
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urb_finished = 1;
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else
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dbg("dl_done_list: strange.., ED state %x, ed->state\n");
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@ -1060,9 +1083,15 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
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}
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bmRType_bReq = cmd->requesttype | (cmd->request << 8);
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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wValue = __swap_16(cmd->value);
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wIndex = __swap_16(cmd->index);
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wLength = __swap_16(cmd->length);
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#else
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wValue = m16_swap (cmd->value);
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wIndex = m16_swap (cmd->index);
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wLength = m16_swap (cmd->length);
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#endif /* CONFIG_440EP || CONFIG_MPC5200 */
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info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
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dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
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@ -1076,6 +1105,20 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
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RH_OTHER | RH_CLASS almost ever means HUB_PORT here
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*/
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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case RH_GET_STATUS:
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*(__u16 *) data_buf = __swap_16(1); OK (2);
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case RH_GET_STATUS | RH_INTERFACE:
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*(__u16 *) data_buf = __swap_16(0); OK (2);
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case RH_GET_STATUS | RH_ENDPOINT:
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*(__u16 *) data_buf = __swap_16(0); OK (2);
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case RH_GET_STATUS | RH_CLASS:
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*(__u32 *) data_buf = __swap_32(
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RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
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OK (4);
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case RH_GET_STATUS | RH_OTHER | RH_CLASS:
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*(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
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#else
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case RH_GET_STATUS:
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*(__u16 *) data_buf = m16_swap (1); OK (2);
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case RH_GET_STATUS | RH_INTERFACE:
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@ -1088,6 +1131,7 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
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OK (4);
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case RH_GET_STATUS | RH_OTHER | RH_CLASS:
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*(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
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#endif /* CONFIG_440EP || CONFIG_MPC5200 */
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case RH_CLEAR_FEATURE | RH_ENDPOINT:
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switch (wValue) {
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@ -1286,8 +1330,10 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
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return -1;
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}
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#if 0
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wait_ms(10);
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/* ohci_dump_status(&gohci); */
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#endif
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/* allow more time for a BULK device to react - some are slow */
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#define BULK_TO 5000 /* timeout in milliseconds */
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@ -1329,6 +1375,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
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err("CTL:TIMEOUT ");
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#ifdef S3C24X0_merge
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dbg("submit_common_msg: TO status %x\n", stat);
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stat = USB_ST_CRC_ERR;
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urb_finished = 1;
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#endif
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stat = USB_ST_CRC_ERR;
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@ -1448,7 +1495,8 @@ static int hc_reset (ohci_t *ohci)
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readl(&ohci->regs->control));
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/* Reset USB (needed by some controllers) */
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writel (0, &ohci->regs->control);
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ohci->hc_control = 0;
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writel (ohci->hc_control, &ohci->regs->control);
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/* HC Reset requires max 10 us delay */
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writel (OHCI_HCR, &ohci->regs->cmdstatus);
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@ -1746,5 +1794,4 @@ int usb_lowlevel_stop(void)
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return 0;
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}
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#endif /* CONFIG_USB_OHCI */
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#endif /* CONFIG_USB_OHCI_NEW */
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|
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@ -113,7 +113,9 @@ struct td {
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__u32 hwNextTD; /* Next TD Pointer */
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__u32 hwBE; /* Memory Buffer End Pointer */
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/* #ifndef CONFIG_MPC5200 /\* this seems wrong *\/ */
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__u16 hwPSW[MAXPSW];
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/* #endif */
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__u8 unused;
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__u8 index;
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struct ed *ed;
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@ -137,8 +139,13 @@ typedef struct td td_t;
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#define NUM_INTS 32 /* part of the OHCI standard */
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struct ohci_hcca {
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__u32 int_table[NUM_INTS]; /* Interrupt ED table */
|
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#if defined(CONFIG_MPC5200)
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__u16 pad1; /* set to 0 on each frame_no change */
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__u16 frame_no; /* current frame number */
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#else
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__u16 frame_no; /* current frame number */
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__u16 pad1; /* set to 0 on each frame_no change */
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#endif
|
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__u32 done_head; /* info returned for an interrupt */
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u8 reserved_for_hc[116];
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} __attribute((aligned(256)));
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@ -147,7 +154,9 @@ struct ohci_hcca {
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/*
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* Maximum number of root hub ports.
|
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*/
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#define MAX_ROOT_PORTS 3 /* maximum OHCI root hub ports */
|
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#ifndef CFG_USB_OHCI_MAX_ROOT_PORTS
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# error "CFG_USB_OHCI_MAX_ROOT_PORTS undefined!"
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#endif
|
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|
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/*
|
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* This is the structure of the OHCI controller's memory mapped I/O
|
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|
|
@ -181,7 +190,7 @@ struct ohci_regs {
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__u32 a;
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__u32 b;
|
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__u32 status;
|
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__u32 portstatus[MAX_ROOT_PORTS];
|
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__u32 portstatus[CFG_USB_OHCI_MAX_ROOT_PORTS];
|
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} roothub;
|
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} __attribute((aligned(32)));
|
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|
||||
|
|
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|||
|
|
@ -94,9 +94,16 @@
|
|||
|
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/* USB */
|
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#if 1
|
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#define CONFIG_USB_OHCI
|
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#define CONFIG_USB_OHCI_NEW
|
||||
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
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#define CONFIG_USB_STORAGE
|
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|
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#undef CFG_USB_OHCI_BOARD_INIT
|
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#define CFG_USB_OHCI_CPU_INIT
|
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#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
|
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#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
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#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
|
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|
||||
#else
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#define ADD_USB_CMD 0
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#endif
|
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|
|
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|||
|
|
@ -146,9 +146,16 @@
|
|||
|
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/* USB */
|
||||
#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
|
||||
#define CONFIG_USB_OHCI
|
||||
#define CONFIG_USB_OHCI_NEW
|
||||
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
|
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#define CONFIG_USB_STORAGE
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||||
|
||||
#undef CFG_USB_OHCI_BOARD_INIT
|
||||
#define CFG_USB_OHCI_CPU_INIT
|
||||
#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
|
||||
#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
|
||||
|
||||
#else
|
||||
#define ADD_USB_CMD 0
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -103,7 +103,7 @@
|
|||
#endif
|
||||
|
||||
/* USB */
|
||||
#define CONFIG_USB_OHCI 1
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define CONFIG_USB_STORAGE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
|
|
@ -111,6 +111,7 @@
|
|||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE
|
||||
#define CFG_USB_OHCI_SLOT_NAME "delta"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
|
||||
|
||||
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
|
||||
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@
|
|||
|
||||
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
|
||||
|
||||
#define CONFIG_USB_OHCI 1
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define CONFIG_USB_KEYBOARD 1
|
||||
#define CONFIG_USB_STORAGE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
|
@ -111,6 +111,7 @@
|
|||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
|
||||
#define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
|
||||
|
||||
#undef CONFIG_HARD_I2C
|
||||
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@
|
|||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
/* USB stuff */
|
||||
#define CONFIG_USB_OHCI 1
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define CONFIG_USB_STORAGE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
|
|
@ -88,6 +88,7 @@
|
|||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE S3C24X0_USB_HOST_BASE
|
||||
#define CFG_USB_OHCI_SLOT_NAME "s3c2400"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
|
|
|
|||
|
|
@ -214,9 +214,15 @@
|
|||
|
||||
#ifdef CONFIG_440EP
|
||||
/* USB */
|
||||
#define CONFIG_USB_OHCI
|
||||
#define CONFIG_USB_OHCI_NEW
|
||||
#define CONFIG_USB_STORAGE
|
||||
|
||||
#undef CFG_USB_OHCI_BOARD_INIT
|
||||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE (CFG_PERIPHERAL_BASE | 0x1000)
|
||||
#define CFG_USB_OHCI_SLOT_NAME "ppc440"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
|
||||
|
||||
/*Comment this out to enable USB 1.1 device*/
|
||||
#define USB_2_0_DEVICE
|
||||
#endif /*CONFIG_440EP*/
|
||||
|
|
|
|||
|
|
@ -169,7 +169,7 @@ struct usb_device {
|
|||
* this is how the lowlevel part communicate with the outer world
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || defined (CONFIG_USB_SL811HS)
|
||||
#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || defined (CONFIG_USB_SL811HS) || defined(CONFIG_USB_OHCI_NEW)
|
||||
int usb_lowlevel_init(void);
|
||||
int usb_lowlevel_stop(void);
|
||||
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len);
|
||||
|
|
@ -230,16 +230,12 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
|||
|
||||
/* big endian -> little endian conversion */
|
||||
/* some CPUs are already little endian e.g. the ARM920T */
|
||||
#ifdef LITTLEENDIAN
|
||||
#define swap_16(x) ((unsigned short)(x))
|
||||
#define swap_32(x) ((unsigned long)(x))
|
||||
#else
|
||||
#define swap_16(x) \
|
||||
#define __swap_16(x) \
|
||||
({ unsigned short x_ = (unsigned short)x; \
|
||||
(unsigned short)( \
|
||||
((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \
|
||||
})
|
||||
#define swap_32(x) \
|
||||
#define __swap_32(x) \
|
||||
({ unsigned long x_ = (unsigned long)x; \
|
||||
(unsigned long)( \
|
||||
((x_ & 0x000000FFUL) << 24) | \
|
||||
|
|
@ -247,6 +243,13 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
|
|||
((x_ & 0x00FF0000UL) >> 8) | \
|
||||
((x_ & 0xFF000000UL) >> 24) ); \
|
||||
})
|
||||
|
||||
#ifdef LITTLEENDIAN
|
||||
# define swap_16(x) (x)
|
||||
# define swap_32(x) (x)
|
||||
#else
|
||||
# define swap_16(x) __swap_16(x)
|
||||
# define swap_32(x) __swap_32(x)
|
||||
#endif /* LITTLEENDIAN */
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue