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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
85xx: Move LAW init code into C
Move the initialization of the LAWs into C code and provide an API to allow modification of LAWs after init. Board code is responsible to provide a law_table and num_law_entries. We should be able to use the same code on 86xx as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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6 changed files with 169 additions and 0 deletions
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@ -31,6 +31,7 @@
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <ioports.h>
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#include <ioports.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/fsl_law.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -140,6 +141,9 @@ void cpu_init_f (void)
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/* Clear initial global data */
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/* Clear initial global data */
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memset ((void *) gd, 0, sizeof (gd_t));
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memset ((void *) gd, 0, sizeof (gd_t));
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#ifdef CONFIG_FSL_LAW
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init_laws();
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#endif
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#ifdef CONFIG_CPM2
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#ifdef CONFIG_CPM2
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config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR);
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config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR);
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@ -222,11 +226,15 @@ void cpu_init_f (void)
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int cpu_init_r(void)
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int cpu_init_r(void)
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{
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{
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#ifdef CONFIG_CLEAR_LAW0
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#ifdef CONFIG_CLEAR_LAW0
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#ifdef CONFIG_FSL_LAW
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disable_law(0);
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#else
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volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
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volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
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/* clear alternate boot location LAW (used for sdram, or ddr bank) */
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/* clear alternate boot location LAW (used for sdram, or ddr bank) */
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ecm->lawar0 = 0;
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ecm->lawar0 = 0;
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#endif
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#endif
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#endif
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#if defined(CONFIG_L2_CACHE)
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#if defined(CONFIG_L2_CACHE)
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volatile ccsr_l2cache_t *l2cache = (void *)CFG_MPC85xx_L2_ADDR;
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volatile ccsr_l2cache_t *l2cache = (void *)CFG_MPC85xx_L2_ADDR;
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@ -27,6 +27,7 @@
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#include <i2c.h>
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#include <i2c.h>
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#include <spd.h>
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#include <spd.h>
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#include <asm/mmu.h>
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#include <asm/mmu.h>
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#include <asm/fsl_law.h>
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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@ -1022,7 +1023,9 @@ spd_sdram(void)
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static unsigned int
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static unsigned int
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setup_laws_and_tlbs(unsigned int memsize)
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setup_laws_and_tlbs(unsigned int memsize)
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{
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{
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#ifndef CONFIG_FSL_LAW
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volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
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volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
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#endif
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unsigned int tlb_size;
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unsigned int tlb_size;
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unsigned int law_size;
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unsigned int law_size;
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unsigned int ram_tlb_index;
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unsigned int ram_tlb_index;
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@ -1098,12 +1101,17 @@ setup_laws_and_tlbs(unsigned int memsize)
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/*
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/*
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* Set up LAWBAR for all of DDR.
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* Set up LAWBAR for all of DDR.
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*/
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*/
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#ifdef CONFIG_FSL_LAW
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set_law(1, CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR);
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#else
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ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
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ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
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ecm->lawar1 = (LAWAR_EN
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ecm->lawar1 = (LAWAR_EN
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| LAWAR_TRGT_IF_DDR
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| LAWAR_TRGT_IF_DDR
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| (LAWAR_SIZE & law_size));
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| (LAWAR_SIZE & law_size));
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debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1);
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debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1);
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debug("DDR: LARAR1=0x%08x\n", ecm->lawar1);
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debug("DDR: LARAR1=0x%08x\n", ecm->lawar1);
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#endif
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/*
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/*
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* Confirm that the requested amount of memory was mapped.
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* Confirm that the requested amount of memory was mapped.
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@ -201,6 +201,7 @@ _start_e500:
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lis r7,CFG_CCSRBAR@h
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lis r7,CFG_CCSRBAR@h
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ori r7,r7,CFG_CCSRBAR@l
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ori r7,r7,CFG_CCSRBAR@l
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#ifndef CONFIG_FSL_LAW
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bl law_entry
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bl law_entry
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mr r6,r0
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mr r6,r0
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lwzu r5,0(r6) /* how many windows we actually use */
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lwzu r5,0(r6) /* how many windows we actually use */
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@ -216,6 +217,7 @@ _start_e500:
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addi r2,r2,0x0020
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addi r2,r2,0x0020
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addi r1,r1,0x0020
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addi r1,r1,0x0020
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bdnz 0b
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bdnz 0b
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#endif
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/* Clear and set up some registers. */
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/* Clear and set up some registers. */
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li r0,0
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li r0,0
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@ -28,6 +28,7 @@ LIB := $(obj)libmisc.a
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COBJS-y += ali512x.o
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COBJS-y += ali512x.o
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COBJS-y += ns87308.o
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COBJS-y += ns87308.o
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COBJS-y += status_led.o
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COBJS-y += status_led.o
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COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
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COBJS := $(COBJS-y)
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COBJS := $(COBJS-y)
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SRCS := $(COBJS:.o=.c)
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SRCS := $(COBJS:.o=.c)
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70
drivers/misc/fsl_law.c
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70
drivers/misc/fsl_law.c
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@ -0,0 +1,70 @@
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/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/io.h>
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#define LAWAR_EN 0x80000000
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void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
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{
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volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
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volatile u32 *lawbar = base + 8 * idx;
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volatile u32 *lawar = base + 8 * idx + 2;
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out_be32(lawbar, addr >> 12);
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out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
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return ;
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}
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void disable_law(u8 idx)
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{
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volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
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volatile u32 *lawbar = base + 8 * idx;
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volatile u32 *lawar = base + 8 * idx + 2;
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out_be32(lawar, 0);
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out_be32(lawbar, 0);
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return;
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}
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void init_laws(void)
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{
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int i;
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u8 law_idx = 0;
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for (i = 0; i < num_law_entries; i++) {
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if (law_table[i].index != -1)
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law_idx = law_table[i].index;
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set_law(law_idx++, law_table[i].addr,
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law_table[i].size, law_table[i].trgt_id);
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}
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return ;
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}
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80
include/asm-ppc/fsl_law.h
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80
include/asm-ppc/fsl_law.h
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@ -0,0 +1,80 @@
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#ifndef _FSL_LAW_H_
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#define _FSL_LAW_H_
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#include <asm/io.h>
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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#define SET_LAW_ENTRY(idx, a, sz, trgt) \
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{ .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
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enum law_size {
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LAW_SIZE_4K = 0xb,
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LAW_SIZE_8K,
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LAW_SIZE_16K,
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LAW_SIZE_32K,
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LAW_SIZE_64K,
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LAW_SIZE_128K,
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LAW_SIZE_256K,
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LAW_SIZE_512K,
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LAW_SIZE_1M,
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LAW_SIZE_2M,
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LAW_SIZE_4M,
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LAW_SIZE_8M,
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LAW_SIZE_16M,
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LAW_SIZE_32M,
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LAW_SIZE_64M,
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LAW_SIZE_128M,
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LAW_SIZE_256M,
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LAW_SIZE_512M,
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LAW_SIZE_1G,
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LAW_SIZE_2G,
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LAW_SIZE_4G,
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LAW_SIZE_8G,
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LAW_SIZE_16G,
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LAW_SIZE_32G,
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};
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enum law_trgt_if {
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LAW_TRGT_IF_PCI = 0x00,
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LAW_TRGT_IF_PCI_2 = 0x01,
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#ifndef CONFIG_MPC8641
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LAW_TRGT_IF_PCIE_1 = 0x02,
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#endif
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#ifndef CONFIG_MPC8572
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LAW_TRGT_IF_PCIE_3 = 0x03,
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#endif
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LAW_TRGT_IF_LBC = 0x04,
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LAW_TRGT_IF_CCSR = 0x08,
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LAW_TRGT_IF_DDR_INTRLV = 0x0b,
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LAW_TRGT_IF_RIO = 0x0c,
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LAW_TRGT_IF_DDR = 0x0f,
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LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
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};
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#define LAW_TRGT_IF_DDR_1 LAW_TRGT_IF_DDR
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#define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
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#define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
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#define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
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#ifdef CONFIG_MPC8641
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#define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
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#endif
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#ifdef CONFIG_MPC8572
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#define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
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#endif
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struct law_entry {
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int index;
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phys_addr_t addr;
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enum law_size size;
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enum law_trgt_if trgt_id;
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};
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extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
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extern void disable_law(u8 idx);
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extern void init_laws(void);
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/* define in board code */
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extern struct law_entry law_table[];
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extern int num_law_entries;
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#endif
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