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arm64: zynqmp: Update the GPU address size
The correct register size is 0x10000, otherwise it overlaps with other register space. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -470,7 +470,7 @@
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gpu: gpu@fd4b0000 {
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status = "disabled";
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compatible = "arm,mali-400", "arm,mali-utgard";
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reg = <0x0 0xfd4b0000 0x0 0x30000>;
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reg = <0x0 0xfd4b0000 0x0 0x10000>;
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interrupt-parent = <&gic>;
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interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
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interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
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