Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-24 21:54:01 +00:00
Code Issues Projects Releases Packages Wiki Activity

video: Drop CONFIG_LCD_ALIGNMENT

Browse source 
This option is not needed now that the LCD implementation is being
removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2022-10-16 15:02:58 -06:00 committed by Anatolij Gustschin
parent b5b1ce8a21
commit 832bcbb083
5 changed files with 0 additions and 27 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
README
View file

@ -815,14 +815,6 @@ The following options need to be configured:
320x240. Black & white.
CONFIG_LCD_ALIGNMENT
Normally the LCD is page-aligned (typically 4KB). If this is
defined then the LCD will be aligned to this value instead.
For ARM it is sometimes useful to use MMU_SECTION_SIZE
here, since it is cheaper to change data cache settings on
a per-section basis.
- MII/PHY support:
CONFIG_PHY_CLOCK_FREQ (ppc4xx)

8
common/lcd.c
View file

@ -35,10 +35,6 @@
#endif
#endif
#ifndef CONFIG_LCD_ALIGNMENT
#define CONFIG_LCD_ALIGNMENT PAGE_SIZE
#endif
#if (LCD_BPP != LCD_COLOR8) && (LCD_BPP != LCD_COLOR16) && \
(LCD_BPP != LCD_COLOR32)
#error Unsupported LCD BPP.
@ -239,10 +235,6 @@ ulong lcd_setmem(ulong addr)
size = lcd_get_size(&line_length);
/* Round up to nearest full page, or MMU section if defined */
size = ALIGN(size, CONFIG_LCD_ALIGNMENT);
addr = ALIGN(addr - CONFIG_LCD_ALIGNMENT + 1, CONFIG_LCD_ALIGNMENT);
/* Allocate pages for the frame buffer. */
addr -= size;

5
include/configs/nyan-big.h
View file

@ -18,11 +18,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
/* Align LCD to 1MB boundary */
#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
/* SPI */
#define CONFIG_SPI_FLASH_SIZE (4 << 20)

5
include/configs/tegra20-common.h
View file

@ -54,11 +54,6 @@
"fdt_addr_r=0x03000000\0" \
"ramdisk_addr_r=0x03100000\0"
/* Defines for SPL */
/* Align LCD to 1MB boundary */
#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE
#ifdef CONFIG_TEGRA_LP0
#define TEGRA_LP0_ADDR 0x1C406000
#define TEGRA_LP0_SIZE 0x2000

1
scripts/config_whitelist.txt
View file

@ -261,7 +261,6 @@ CONFIG_KSNET_SERDES_SGMII2_BASE
CONFIG_KSNET_SERDES_SGMII_BASE
CONFIG_L1_INIT_RAM
CONFIG_L2_CACHE
CONFIG_LCD_ALIGNMENT
CONFIG_LCD_MENU
CONFIG_LD9040
CONFIG_LEGACY_BOOTCMD_ENV