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https://github.com/AsahiLinux/u-boot
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ppc: Clean up calling of phy_reset() during init
Remove board-specific #ifdefs for calling phy_reset() during initializtion Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
parent
b3ab9dfd49
commit
81e60235bd
15 changed files with 18 additions and 16 deletions
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@ -38,6 +38,7 @@
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#define CONFIG_MPC860 1 /* This is a MPC860 CPU ... */
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#define CONFIG_CCM 1 /* on a Card Controller Module */
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#define CONFIG_MISC_INIT_R /* Call misc_init_r() */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
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#undef CONFIG_8xx_CONS_SMC2
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@ -57,6 +57,7 @@
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/* BOOT arguments */
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#define CONFIG_PREBOOT \
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@ -36,6 +36,7 @@
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#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
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#define CONFIG_IP860 1 /* ...on a IP860 board */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
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#define CONFIG_BAUDRATE 9600
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@ -52,6 +52,8 @@
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#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
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#define CONFIG_8xx_GCLK_FREQ 50331648
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */
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#if 0
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@ -49,6 +49,8 @@
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#undef CONFIG_8xx_CONS_NONE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
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#define CONFIG_8xx_GCLK_FREQ 50331648
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@ -81,6 +81,7 @@
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#endif /* CONFIG_ADSTYPE == CONFIG_SYS_8272ADS */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/* allow serial and ethaddr to be overwritten */
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#define CONFIG_ENV_OVERWRITE
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@ -54,6 +54,7 @@
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#define CONFIG_CPM2 1 /* Has a CPM2 */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/* allow serial and ethaddr to be overwritten */
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#define CONFIG_ENV_OVERWRITE
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@ -48,6 +48,7 @@
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#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/*
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* sysclk for MPC85xx
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@ -189,6 +189,7 @@
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#define CONFIG_CPM2 1 /* Has a CPM2 */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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/*
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* Miscellaneous configurable options
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@ -77,6 +77,7 @@
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#undef CONFIG_BTB /* toggle branch predition */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
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@ -36,6 +36,8 @@
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#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
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#define CONFIG_SPD823TS 1 /* ...on a SPD823TS board */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
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#undef CONFIG_8xx_CONS_SMC2
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#undef CONFIG_8xx_CONS_NONE
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@ -43,6 +43,7 @@
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#define CONFIG_PCU_E 1 /* ...on a PCU E board */
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#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
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@ -71,6 +71,7 @@
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#undef CONFIG_BTB /* toggle branch predition */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
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@ -66,6 +66,7 @@
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#define CONFIG_BTB /* toggle branch predition */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
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@ -1000,22 +1000,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
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eth_initialize (bd);
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#endif
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#if defined(CONFIG_CMD_NET) && ( \
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defined(CONFIG_CCM) || \
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defined(CONFIG_ELPT860) || \
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defined(CONFIG_EP8260) || \
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defined(CONFIG_IP860) || \
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defined(CONFIG_IVML24) || \
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defined(CONFIG_IVMS8) || \
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defined(CONFIG_MPC8260ADS) || \
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defined(CONFIG_MPC8266ADS) || \
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defined(CONFIG_MPC8560ADS) || \
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defined(CONFIG_PCU_E) || \
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defined(CONFIG_RPXSUPER) || \
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defined(CONFIG_STXGP3) || \
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defined(CONFIG_SPD823TS) || \
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defined(CONFIG_RESET_PHY_R) )
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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WATCHDOG_RESET ();
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debug ("Reset Ethernet PHY\n");
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reset_phy ();
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