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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
arm: mvebu: Move SoC selection (A38X vs AXP) into Kconfig
Until now, the SoC selection for the ARCH_MVEBU platforms has been done in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As it needed to get selected for AXP and A38x based boards. This patch now changes this to move the SoC selection to Kconfig. And also uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x. This makes things a bit clearer - especially for new board additions. Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available CONFIG_ARMADA_38X and CONFIG_ARMADA_XP. And CONFIG_DDR3 is removed, as its not referenced anywhere. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
This commit is contained in:
parent
b322c83aa4
commit
81e33f4b65
15 changed files with 33 additions and 38 deletions
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@ -49,7 +49,7 @@ machine-$(CONFIG_ARCH_HIGHBANK) += highbank
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machine-$(CONFIG_ARCH_KEYSTONE) += keystone
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# TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
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machine-$(CONFIG_KIRKWOOD) += kirkwood
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machine-$(CONFIG_ARMADA_XP) += mvebu
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machine-$(CONFIG_ARCH_MVEBU) += mvebu
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# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
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# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
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machine-$(CONFIG_ORION5X) += orion5x
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@ -1,20 +1,30 @@
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if ARCH_MVEBU
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config ARMADA_38X
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bool
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config ARMADA_XP
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bool
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choice
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prompt "Marvell MVEBU (Armada XP/38x) board select"
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optional
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config TARGET_CLEARFOG
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bool "Support ClearFog"
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select ARMADA_38X
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config TARGET_DB_88F6820_GP
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bool "Support DB-88F6820-GP"
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select ARMADA_38X
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config TARGET_DB_MV784MP_GP
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bool "Support db-mv784mp-gp"
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select ARMADA_XP
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config TARGET_MAXBCM
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bool "Support maxbcm"
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select ARMADA_XP
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endchoice
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@ -15,8 +15,8 @@ else
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obj-y = cpu.o
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obj-y += dram.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_SYS_MVEBU_DDR_A38X) += ../../../drivers/ddr/marvell/a38x/xor.o
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obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += ../../../drivers/ddr/marvell/axp/xor.o
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obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
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obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
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endif
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obj-y += gpio.o
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obj-y += mbus.o
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@ -24,7 +24,7 @@ obj-y += timer.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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obj-$(CONFIG_SPL_BUILD) += lowlevel_spl.o
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obj-$(CONFIG_SYS_MVEBU_DDR_A38X) += serdes/a38x/
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obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += serdes/axp/
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obj-$(CONFIG_ARMADA_38X) += serdes/a38x/
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obj-$(CONFIG_ARMADA_XP) += serdes/axp/
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endif
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@ -12,11 +12,8 @@
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#ifdef CONFIG_SYS_MVEBU_DDR_A38X
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#include "../../../drivers/ddr/marvell/axp/xor.h"
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#include "../../../drivers/ddr/marvell/axp/xor_regs.h"
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#endif
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#ifdef CONFIG_SYS_MVEBU_DDR_AXP
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#if defined(CONFIG_ARCH_MVEBU)
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/* Use common XOR definitions for A3x and AXP */
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#include "../../../drivers/ddr/marvell/axp/xor.h"
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#include "../../../drivers/ddr/marvell/axp/xor_regs.h"
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#endif
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@ -112,7 +109,7 @@ void mvebu_sdram_size_adjust(enum memory_bank bank)
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mvebu_sdram_bs_set(bank, size);
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}
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#if defined(CONFIG_SYS_MVEBU_DDR_A38X) || defined(CONFIG_SYS_MVEBU_DDR_AXP)
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#if defined(CONFIG_ARCH_MVEBU)
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static u32 xor_ctrl_save;
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static u32 xor_base_save;
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static u32 xor_mask_save;
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@ -292,7 +289,7 @@ void dram_init_banksize(void)
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}
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}
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#if defined(CONFIG_ARMADA_XP)
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#if defined(CONFIG_ARCH_MVEBU)
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void board_add_ram_info(int use_default)
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{
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struct sar_freq_modes sar_freq;
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@ -17,7 +17,11 @@
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#include <asm/arch/soc.h>
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#if defined(CONFIG_ARMADA_XP)
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#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_38X)
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/*
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* Set this for the common xor register definitions needed in dram.c
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* for A38x as well here.
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*/
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#define MV88F78X60 /* for the DDR training bin_hdr code */
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#endif
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@ -491,7 +491,7 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count)
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#if defined(CONFIG_KIRKWOOD)
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mbus_state.soc = &kirkwood_mbus_data;
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#endif
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#if defined(CONFIG_ARMADA_XP)
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#if defined(CONFIG_ARCH_MVEBU)
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mbus_state.soc = &armada_370_xp_mbus_data;
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#endif
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@ -31,7 +31,7 @@ int timer_init(void)
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writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10);
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writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14);
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#if defined(CONFIG_ARMADA_XP)
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#if defined(CONFIG_ARCH_MVEBU)
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/* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */
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setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11));
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#endif
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@ -14,8 +14,8 @@ obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/
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obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/
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obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/
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obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
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obj-$(CONFIG_SYS_MVEBU_DDR_A38X) += ddr/marvell/a38x/
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obj-$(CONFIG_SYS_MVEBU_DDR_AXP) += ddr/marvell/axp/
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obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
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obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
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obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
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obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
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obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/
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@ -13,7 +13,7 @@
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#include <asm/arch/orion5x.h>
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#elif defined(CONFIG_KIRKWOOD)
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#include <asm/arch/soc.h>
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#elif defined(CONFIG_ARMADA_XP)
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#elif defined(CONFIG_ARCH_MVEBU)
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#include <linux/mbus.h>
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#endif
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@ -102,7 +102,7 @@ struct mvsata_port_registers {
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* Initialize SATA memory windows for Armada XP
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*/
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#ifdef CONFIG_ARMADA_XP
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#ifdef CONFIG_ARCH_MVEBU
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static void mvsata_ide_conf_mbus_windows(void)
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{
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const struct mbus_dram_target_info *dram;
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@ -174,7 +174,7 @@ int ide_preinit(void)
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int ret = MVSATA_STATUS_TIMEOUT;
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int status;
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#ifdef CONFIG_ARMADA_XP
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#ifdef CONFIG_ARCH_MVEBU
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mvsata_ide_conf_mbus_windows();
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#endif
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@ -20,7 +20,7 @@
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#if defined(CONFIG_ORION5X)
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#include <asm/arch/orion5x.h>
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#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARMADA_XP))
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#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
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#include <asm/arch/soc.h>
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#elif defined(CONFIG_SUNXI)
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#include <asm/arch/i2c.h>
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@ -10,8 +10,6 @@
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_ARMADA_XP /* SOC Family Name */
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#define CONFIG_ARMADA_38X
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#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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@ -170,10 +168,6 @@
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#endif
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#endif
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SYS_MVEBU_DDR_A38X
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#define CONFIG_DDR3
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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@ -10,8 +10,6 @@
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_ARMADA_XP /* SOC Family Name */
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#define CONFIG_ARMADA_38X
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#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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@ -170,10 +168,6 @@
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#endif
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#endif
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SYS_MVEBU_DDR_A38X
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#define CONFIG_DDR3
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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@ -10,7 +10,6 @@
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_ARMADA_XP /* SOC Family Name */
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#define CONFIG_DB_784MP_GP /* Board target name for DDR training */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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@ -144,7 +143,6 @@
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#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SYS_MVEBU_DDR_AXP
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#define CONFIG_SPD_EEPROM 0x4e
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#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
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@ -10,7 +10,6 @@
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_ARMADA_XP /* SOC Family Name */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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/*
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@ -106,7 +105,6 @@
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SYS_MVEBU_DDR_AXP
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#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
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#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
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@ -156,7 +156,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o
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HOSTCFLAGS_ubsha1.o := -pedantic
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hostprogs-$(CONFIG_KIRKWOOD) += kwboot
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hostprogs-$(CONFIG_ARMADA_XP) += kwboot
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hostprogs-$(CONFIG_ARCH_MVEBU) += kwboot
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hostprogs-y += proftool
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hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela
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