Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-18 06:58:54 +00:00
Code Issues Projects Releases Packages Wiki Activity

arm: mx35: use common timer functions

Browse source 
This patch moves mx35 to the common timer functions added in commit

  8dfafdd - Introduce common timer functions <Rob Herring>

The (removed) mx35 timer code (specifically __udelay()) could deadlock at
the 32-bit boundary of get_ticks().  get_ticks() returned a 32-bit value
cast up to a 64-bit value.  If get_ticks() + tmo in __udelay() crossed
the 32-bit boundary, the while condition became unconditionally true and
locks the processor.  Rather than patch the specific mx35 issues, simply
move everything over to the common code.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Andrew Ruder 2014-08-12 09:26:01 -05:00 • committed by Stefano Babic
parent 93a0ea501e
commit 816264fc66
2 changed files with 12 additions and 83 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

83
arch/arm/cpu/arm1136/mx35/timer.c
View file

@ -9,43 +9,17 @@
#include <common.h>
#include <asm/io.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
DECLARE_GLOBAL_DATA_PTR;
#define timestamp (gd->arch.tbl)
#define lastinc (gd->arch.lastinc)
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
#define GPTCR_FRR (1<<9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
#define GPTCR_TEN (1) /* Timer enable */
/*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
* "tick" is internal timer period
*/
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
do_div(tick, MXC_CLK32);
return tick;
}
static inline unsigned long long us_to_tick(unsigned long long us)
{
us = us * MXC_CLK32 + 999999;
do_div(us, 1000000);
return us;
}
/*
* nothing really to do with interrupts, just starts up a counter.
* The 32KHz 32-bit timer overruns in 134217 seconds
@ -71,60 +45,3 @@ int timer_init(void)
return 0;
}
unsigned long long get_ticks(void)
{
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
ulong now = readl(&gpt->counter); /* current tick value */
if (now >= lastinc) {
/*
* normal mode (non roll)
* move stamp forward with absolut diff ticks
*/
timestamp += (now - lastinc);
} else {
/* we have rollover of incrementer */
timestamp += (0xFFFFFFFF - lastinc) + now;
}
lastinc = now;
return timestamp;
}
ulong get_timer_masked(void)
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
* 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough.
*/
return tick_to_time(get_ticks());
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
/* delay x useconds AND preserve advance timstamp value */
void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
tmo = us_to_tick(usec);
tmp = get_ticks() + tmo; /* get current timestamp */
while (get_ticks() < tmp) /* loop till event */
/*NOP*/;
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return MXC_CLK32;
}

12
arch/arm/include/asm/arch-mx35/imx-regs.h
View file

@ -372,4 +372,16 @@ struct aips_regs {
#define CCM_RCSR_NF_16BIT_SEL (1 << 14)
#endif
/*
* Generic timer support
*/
#ifdef CONFIG_MX35_CLK32
#define CONFIG_SYS_TIMER_RATE CONFIG_MX35_CLK32
#else
#define CONFIG_SYS_TIMER_RATE 32768
#endif
#define CONFIG_SYS_TIMER_COUNTER (GPT1_BASE_ADDR+36)
#endif /* __ASM_ARCH_MX35_H */