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Kconfig: USB: Migrate existing USB_EHCI_xxx options
The following options are migrated over fully now: - USB_EHCI_ATMEL - USB_EHCI_MARVELL - USB_EHCI_MX6 - USB_EHCI_MX7 - USB_EHCI_MSM - USB_EHCI_ZYNQ - USB_EHCI_GENERIC This also requires fixing the depends on USB_EHCI_MARVELL as it's used by Orion5X and Kirkwood as well. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marex@denx.de>
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38 changed files with 2 additions and 39 deletions
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@ -89,7 +89,6 @@
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* USB/EHCI
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MARVELL
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#define CONFIG_EHCI_IS_TDI
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#endif /* CONFIG_CMD_USB */
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@ -85,8 +85,8 @@ config USB_EHCI_ATMEL
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Enables support for the on-chip EHCI controller on Atmel chips.
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config USB_EHCI_MARVELL
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bool "Support for MVEBU (AXP / A38x) on-chip EHCI USB controller"
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depends on ARCH_MVEBU
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bool "Support for Marvell on-chip EHCI USB controller"
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depends on ARCH_MVEBU || KIRKWOOD || ORION5X
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default y
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---help---
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Enables support for the on-chip EHCI controller on MVEBU SoCs.
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@ -55,7 +55,6 @@
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#define CONFIG_BOUNCE_BUFFER
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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@ -202,7 +202,6 @@
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#define CONFIG_RTC_M41T11
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@ -61,7 +61,6 @@
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -96,7 +96,6 @@
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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/* USB DFU support */
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@ -74,7 +74,6 @@
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#endif
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#if !defined(CONFIG_USB_XHCI_HCD)
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#define CONFIG_USB_EHCI_MARVELL
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#define CONFIG_EHCI_IS_TDI
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#endif
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@ -171,7 +171,6 @@
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* Common USB/EHCI configuration
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MARVELL
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#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
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#define CONFIG_SUPPORT_VFAT
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#endif /* CONFIG_CMD_USB */
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@ -35,7 +35,6 @@
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#define CONFIG_SYS_I2C_SPEED 100000
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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@ -68,7 +68,6 @@
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/* USB Configs */
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#ifdef CONFIG_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@ -156,7 +156,6 @@
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#define CONFIG_ARP_TIMEOUT 200UL
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_SMSC95XX
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@ -137,7 +137,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@ -102,7 +102,6 @@
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* USB device */
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@ -98,7 +98,6 @@
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"128k@0x19C0000(swupdate-kernel-dtb.nor)"
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@ -44,7 +44,6 @@
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#define CONFIG_IMX_VIDEO_SKIP
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/* USB */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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@ -128,7 +128,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -15,7 +15,6 @@
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#define CONFIG_MMCROOT "/dev/mmcblk0p2"
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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@ -63,7 +63,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -159,7 +159,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -149,7 +149,6 @@
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#define CONFIG_PHY_ATHEROS
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -167,7 +167,6 @@
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#define CONFIG_PHY_ATHEROS
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -186,7 +186,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_PHY_MICREL_KSZ9021
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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@ -135,7 +135,6 @@
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -55,7 +55,6 @@
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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@ -37,7 +37,6 @@
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_AT91_WANTS_COMMON_PHY
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/* USB */
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_PHYLIB
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/* USB config */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#endif
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#define CONFIG_TFTP_TSIZE
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/* USB */
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
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/* MMC */
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@ -93,7 +93,6 @@
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_PHY_MICREL_KSZ9021
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_ATMEL
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#endif
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#define CONFIG_PHY_ATHEROS
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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