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Add support for HP Jornada flashrom boards

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This patch adds support for the HP Jornada flashboards
that were made in 2008. Older flashroms should work if
memory registers are adjusted.

Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>

Adpted for TEXT_BASE -> CONFIG_SYS_TEXT_BASE rename.
Removed now redundant board/jornada/config.mk file.
Removed unused empty jornada_init() function to silence
"jornada.c:35: warning: 'jornada_init' defined but not used"

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Kristoffer Ericson 2010-10-15 23:31:43 +02:00 committed by Wolfgang Denk
parent f3a14d377e
commit 80bf2bb501
7 changed files with 541 additions and 0 deletions
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4
MAINTAINERS
View file

@ -597,6 +597,10 @@ Thomas Elste <info@elste.org>
modnet50 ARM720T (NET+50) modnet50 ARM720T (NET+50)
Kristoffer Ericson <kristoffer.ericson@gmail.com>
jornada SA1110
Fabio Estevam <Fabio.Estevam@freescale.com> Fabio Estevam <Fabio.Estevam@freescale.com>
mx31pdk i.MX31 mx31pdk i.MX31

53
board/jornada/Makefile Normal file
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@ -0,0 +1,53 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# 2004 (c) MontaVista Software, Inc.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := jornada.o
SOBJS := setup.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

60
board/jornada/jornada.c Normal file
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@ -0,0 +1,60 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <SA-1100.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_JORNADA720;
gd->bd->bi_boot_params = 0xc0000100;
/*
* Turn on flashing.
* Would be nice to have some protection but
* that would have to be implemented in the
* flash init function, which isnt possible yet.
*/
PPSR |= (1 << 7);
PPDR |= (1 << 7);
return 0;
}
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
return (0);
}

210
board/jornada/setup.S Normal file
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@ -0,0 +1,210 @@
/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include "config.h"
#include "version.h"
/*-----------------------------------------------------------------------
* Board defines:
*/
#define MDCNFG 0x00
#define MDCAS00 0x04
#define MDCAS01 0x08
#define MDCAS02 0x0C
#define MSC0 0x10
#define MSC1 0x14
#define MECR 0x18
#define MDREFR 0x1C
#define MDCAS20 0x20
#define MDCAS21 0x24
#define MDCAS22 0x28
#define MSC2 0x2C
#define SMCNFG 0x30
#define GPDR 0x04
#define GPSR 0x08
#define GPCR 0x0C
#define GAFR 0x1C
#define PPDR 0x00
#define PPSR 0x04
#define PPAR 0x08
#define MDREFR_TRASR(n_) (n_ & (0x0000000f))
#define MDREFR_DRI(n_) ((n_ & (0x00000fff)) << 4)
#define MDREFR_K0DB2 (1 << 18)
#define MDREFR_K1DB2 (1 << 22)
#define MDREFR_K2DB2 (1 << 26)
#define MDREFR_K0RUN (1 << 17)
#define MDREFR_K1RUN (1 << 21)
#define MDREFR_K2RUN (1 << 25)
#define MDREFR_SLFRSH (1 << 31)
#define MDREFR_E1PIN (1 << 20)
#define PSSR 0x04
#define PSSR_DH 0x00000008
#define POSR 0x08
#define RCSR 0x04
/*-----------------------------------------------------------------------
* Setup parameters for the board:
*/
MEM_BASE: .long 0xa0000000
MEM_START: .long 0xc0000000
PWR_BASE: .word 0x90020000
RST_BASE: .long 0x90030000
PPC_BASE: .long 0x90060000
GPIO_BASE: .long 0x90040000
IC_BASE: .word 0x90050000
cpuspeed: .word 0xa0
/* calculated from old blob bootloader */
mdcnfg: .long 0x00037267 /* mdcnfg 0x00037267 */
mdcas00: .long 0x5555557f /* mdcas00 0x5555557f */
mdcas01: .long 0x55555555 /* mdcas01 0x55555555 */
mdcas02: .long 0x55555555 /* mdcas02 0x55555555 */
msc0: .long 0xfff04f78 /* msc0 0xfff04f78 */
msc1: .long 0xfff8fff0 /* msc1 0xfff8fff0 */
mecr: .long 0x98c698c6 /* mecr 0x98c698c6 */
mdrefr: .long 0x067600c7 /* mdrefr 0x04340327 */
mdcas20: .long 0xd1284142 /* mdcas20 0xd1284142 */
mdcas21: .long 0x72249529 /* mdcas21 0x72249529 */
mdcas22: .long 0x78414351 /* mdcas22 0x78414351 */
msc2: .long 0x201d2959 /* msc2 0x201d2959 */
smcnfg: .long 0x00000000 /* smcnfg 0x00000000 */
pin_set_out: .long 0x37ff70
pin_set_dir: .long 0x11480
gpdr_set: .long 0x0B3A0900
gpsr_set: .long 0x02100800
gpcr_set: .long 0x092A0100
gafr_set: .long 0x08600000
.globl lowlevel_init
lowlevel_init:
/* set output and direction of pins */
ldr r0, PPC_BASE
ldr r1, pin_set_out
str r1, [r0, #PPSR]
ldr r1, pin_set_dir
str r1, [r0, #PPDR]
/* Setting up the memory and stuff */
/***********************************/
ldr r0, MEM_BASE
ldr r1, mdcnfg
str r1, [r0, #MDCNFG]
ldr r1, mdcas00
str r1, [r0, #MDCAS00]
ldr r1, mdcas01
str r1, [r0, #MDCAS01]
ldr r1, mdcas02
str r1, [r0, #MDCAS02]
ldr r1, mdcas20
str r1, [r0, #MDCAS20]
ldr r1, mdcas21
str r1, [r0, #MDCAS21]
ldr r1, mdcas22
str r1, [r0, #MDCAS22]
/* clear kxDB2 */
ldr r2, [r0, #MDREFR]
bic r2, r2, #MDREFR_K0DB2
bic r2, r2, #MDREFR_K1DB2
bic r2, r2, #MDREFR_K2DB2
str r2, [r0, #MDREFR]
ldr r2, [r0, #MDREFR]
orr r2, r2, #MDREFR_TRASR(7)
mov r4, #0x2000
spin: subs r4, r4, #1
bne spin
ldr r1, PWR_BASE
mov r2, #PSSR_DH
str r2, [r1, #PSSR]
ldr r2, [r0, #MDREFR]
bic r2, r2, #MDREFR_K0DB2
bic r2, r2, #MDREFR_K1DB2
bic r2, r2, #MDREFR_K2DB2
str r2, [r0, #MDREFR]
ldr r2, [r0, #MDREFR]
orr r2, r2, #MDREFR_TRASR(7)
orr r2, r2, #MDREFR_DRI(12)
orr r2, r2, #MDREFR_K0DB2
orr r2, r2, #MDREFR_K1DB2
orr r2, r2, #MDREFR_K2DB2
str r2, [r0, #MDREFR]
ldr r2, [r0, #MDREFR]
orr r2, r2, #MDREFR_K0RUN
orr r2, r2, #MDREFR_K1RUN
orr r2, r2, #MDREFR_K2RUN
str r2, [r0, #MDREFR]
ldr r2, [r0, #MDREFR]
bic r2, r2, #MDREFR_SLFRSH
str r2, [r0, #MDREFR]
ldr r2, [r0, #MDREFR]
orr r2, r2, #MDREFR_E1PIN
str r2, [r0, #MDREFR]
ldr r2, MEM_START
.rept 8
ldr r3, [r2]
.endr
ldr r1, msc0
str r1, [r0, #MSC0]
ldr r1, msc1
str r1, [r0, #MSC1]
ldr r1, msc2
str r1, [r0, #MSC2]
ldr r1, smcnfg
str r1, [r0, #SMCNFG]
ldr r1, mdcnfg
str r1, [r0, #MDCNFG]
ldr r1, mecr
str r1, [r0, #MECR]
/* enable SDRAM */
orr r1, r1, #0x00000001
str r1, [r0, #MDCNFG]
mov pc, lr

58
board/jornada/u-boot.lds Normal file
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@ -0,0 +1,58 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/sa1100/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

1
boards.cfg
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@ -69,6 +69,7 @@ dnp1110 arm sa1100
gcplus arm sa1100 gcplus arm sa1100
lart arm sa1100 lart arm sa1100
shannon arm sa1100 shannon arm sa1100
jornada arm sa1100
mimc200 avr32 at32ap - mimc at32ap700x mimc200 avr32 at32ap - mimc at32ap700x
ip04 blackfin blackfin ip04 blackfin blackfin
eNET i386 i386 - - sc520 eNET i386 i386 - - sc520

155
include/configs/jornada.h Normal file
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@ -0,0 +1,155 @@
/*
* Copyright 2010 (C)
* Kristoffer Ericson <kristoffer.ericson@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SA1110 1 /* This is an SA110 CPU */
#define CONFIG_JORNADA700 1 /* on an HP Jornada 700 series */
#define CONFIG_SYS_FLASH_PROTECTION 1
#define CONFIG_SYS_ARM_WITHOUT_RELOC 1
#define CONFIG_SYS_TEXT_BASE 0xC1F00000
/* we will never enable dcache, because we have to setup MMU first */
#define CONFIG_SYS_NO_DCACHE
#undef CONFIG_USE_IRQ
/* Console setting */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size for initial data */
/*
* select serial console configuration
*/
#define CONFIG_SA1100_SERIAL 1
#define CONFIG_SERIAL3 1 /* we use serial 3 */
#define CONFIG_BAUDRATE 19200
#define CONFIG_LOADS_ECHO 1
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_JFFS2
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
#define CONFIG_BOOTDELAY 5
#define CONFIG_BOOTARGS "root=/dev/hda1 console=ttySA0,19200n8 console=tty1"
#define CONFIG_BOOTCOMMAND "run boot_kernel"
#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
#define CONFIG_SYS_LOAD_ADDR 0xc0000000
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "HP Jornada# "
#define CONFIG_SYS_CBSIZE 256 /* console buffsize */
#define CONFIG_SYS_PBSIZE (256+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE 256 /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0xc0040000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc2000000 /* 4..128 MB */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x0a /* core clock 206MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 19200, 38400, 57600, 115200 }
/*-----------------------------------------------------------------------
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_ERASE_TOUT (4096)
#define CONFIG_SYS_FLASH_WRITE_TOUT (4096)
#define CONFIG_SYS_FLASH_INCREMENT 0x02000000
#define PHYS_FLASH_1 0x00000000 /* starts at 0x0 */
#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256KB Sectors */
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 260
#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
#define CONFIG_SYS_FLASH_EMPTY_INFO 1
#define CONFIG_SYS_MONITOR_LEN 0x00040000
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_FLASH_SHOW_PROGRESS 1
/* Environment */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR 0x00040000
#define CONFIG_ENV_OFFSET 0x00040000
#define CONFIG_ENV_SIZE 0x00040000
#define CONFIG_ENV_SECT_SIZE 0x00040000
#define CONFIG_ENV_OVERWRITE 1
/*
Monitor - 0x00000000 - 0x00040000 (256kb)
Environment - 0x00040000 - 0x00080000 (256kb)
Kernel - 0x00080000 - 0x00380000 (3mb)
Rootfs - 0x00380000 - 0x........ (rest)
*/
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_INIT_SP_ADDR 0x0
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_2 0xc4000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT "nor0=jornada7xx-0"
#define MTDPARTS_DEFAULT "mtdparts=jornada7xx-0:256k(u-boot),256k(env),"\
"3m(kernel),-(user);"
#define CONFIG_EXTRA_ENV_SETTINGS \
"flash_kernel=protect off all; " \
"erase 00080000 0037ffff;cp.b c0000000 00080000 00300000;\0" \
"flash_uboot=protect off all; " \
"erase 00000000 0003ffff;cp.b c0000000 00000000 00040000;\0" \
"boot_kernel=cp.b 00080000 c0000000 00300000;bootm;\0"
#endif /* __CONFIG_H */