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arm: mvebu: Add support for specifying VHV_Enable GPIO

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VHV_Enable GPIO is required to enable during eFuse programming on Armada
SoCs not from 3700 family. Add support for enabling and disabling VHV pin
via GPIO during eFuse programming, when specified.

All details are in Marvell AN-389: ARMADA VHV Power document
(Doc. No. MV-S302545-00 Rev. C, August 2, 2016).

Note that due to HW Errata 3.6 eFuse erroneous burning (Ref #: HWE-3718342)
VHV power must be disabled while core voltage is off to prevent erroneous
eFuse programming.

This is specified in Marvell ARMADA 380/385/388 Functional Errata,
Guidelines, and Restrictions document
(Doc. No. MV-S501377-00 Rev. D, December 1, 2016).

Signed-off-by: Pali Rohár <pali@kernel.org>
This commit is contained in:
Pali Rohár 2022-09-22 13:43:45 +02:00 committed by Stefan Roese
parent 3b44b3fdf2
commit 8092d1dd41
2 changed files with 54 additions and 3 deletions
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15
arch/arm/mach-mvebu/Kconfig
View file

@ -348,6 +348,21 @@ config MVEBU_EFUSE_FAKE
from a memory block.
This is can be used for testing prog scripts.
config MVEBU_EFUSE_VHV_GPIO
string "VHV_Enable GPIO name for eFuse programming"
depends on MVEBU_EFUSE && !ARMADA_3700
help
The eFuse programing (burning) phase requires supplying 1.8V to the
device on the VHV power pin, while for normal operation the VHV power
rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
.
This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
bool "VHV_Enable GPIO is Active Low"
depends on MVEBU_EFUSE_VHV_GPIO != ""
config SECURED_MODE_IMAGE
bool "Build image for trusted boot"
default false

42
arch/arm/mach-mvebu/efuse.c
View file

@ -10,6 +10,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/efuse.h>
#include <asm/arch/soc.h>
#include <asm/gpio.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/mbus.h>
@ -56,17 +57,48 @@ static struct mvebu_hd_efuse *get_efuse_line(int nr)
return efuses + nr;
}
static void enable_efuse_program(void)
#ifndef DRY_RUN
static int vhv_gpio;
#endif
static int enable_efuse_program(void)
{
#ifndef DRY_RUN
if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
if (gpio_lookup_name(CONFIG_MVEBU_EFUSE_VHV_GPIO, NULL, NULL, &vhv_gpio)) {
printf("Error: VHV gpio lookup failed\n");
return -EOPNOTSUPP;
}
if (gpio_request(vhv_gpio, CONFIG_MVEBU_EFUSE_VHV_GPIO)) {
printf("Error: VHV gpio request failed\n");
return -EOPNOTSUPP;
}
if (gpio_direction_output(vhv_gpio,
IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 0 : 1)) {
printf("Error: VHV gpio enable failed\n");
return -EINVAL;
}
mdelay(5); /* Wait for the VHV power to stabilize */
}
setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
#endif
return 0;
}
static void disable_efuse_program(void)
{
#ifndef DRY_RUN
clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
if (gpio_direction_output(vhv_gpio,
IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 1 : 0))
printf("Error: VHV gpio disable failed\n");
gpio_free(vhv_gpio);
vhv_gpio = 0;
}
#endif
}
@ -123,7 +155,9 @@ static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
return 0;
enable_efuse_program();
res = enable_efuse_program();
if (res)
return res;
res = do_prog_efuse(efuse, new_val, mask0, mask1);
@ -155,7 +189,9 @@ int mvebu_prog_ld_efuse(int ld1, u32 word, u32 val)
if (val == (line[word] & val))
return 0;
enable_efuse_program();
res = enable_efuse_program();
if (res)
return res;
mvebu_read_ld_efuse(ld1, line);
line[word] |= val;