powerpc/mpc8xxx DDR: Fix CAS latency calculation

Empty slot should be skipped when calculating CAS latency.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
York Sun 2012-08-17 08:22:41 +00:00 committed by Andy Fleming
parent 45064adcae
commit 7e4db27ffd

View file

@ -27,8 +27,10 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
/* compute the common CAS latency supported between slots */ /* compute the common CAS latency supported between slots */
tmp = dimm_params[0].caslat_X; tmp = dimm_params[0].caslat_X;
for (i = 1; i < number_of_dimms; i++) for (i = 1; i < number_of_dimms; i++) {
tmp &= dimm_params[i].caslat_X; if (dimm_params[i].n_ranks)
tmp &= dimm_params[i].caslat_X;
}
common_caslat = tmp; common_caslat = tmp;
/* compute the max tAAmin tCKmin between slots */ /* compute the max tAAmin tCKmin between slots */