mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 00:49:43 +00:00
arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
- compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This commit is contained in:
parent
341f548ee9
commit
7dd5891061
2 changed files with 15 additions and 2 deletions
|
@ -9,4 +9,8 @@
|
||||||
#
|
#
|
||||||
|
|
||||||
obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
|
obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
|
||||||
obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o
|
ifneq ($(CONFIG_SPL_BUILD),)
|
||||||
|
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
|
||||||
|
obj-$(CONFIG_SAMA5D3) += mpddrc.o
|
||||||
|
obj-y += spl.o
|
||||||
|
endif
|
||||||
|
|
|
@ -17,6 +17,15 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
|
||||||
writel(0, ram_address);
|
writel(0, ram_address);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int ddr2_decodtype_is_seq(u32 cr)
|
||||||
|
{
|
||||||
|
#if defined(CONFIG_SAMA5D3)
|
||||||
|
if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
|
||||||
|
return 0;
|
||||||
|
#endif
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
int ddr2_init(const unsigned int ram_address,
|
int ddr2_init(const unsigned int ram_address,
|
||||||
const struct atmel_mpddr *mpddr_value)
|
const struct atmel_mpddr *mpddr_value)
|
||||||
{
|
{
|
||||||
|
@ -25,7 +34,7 @@ int ddr2_init(const unsigned int ram_address,
|
||||||
|
|
||||||
/* Compute bank offset according to NC in configuration register */
|
/* Compute bank offset according to NC in configuration register */
|
||||||
ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
|
ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
|
||||||
if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
|
if (ddr2_decodtype_is_seq(mpddr_value->cr))
|
||||||
ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
|
ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
|
||||||
|
|
||||||
ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;
|
ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;
|
||||||
|
|
Loading…
Reference in a new issue