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ram: rockchip: update lpddr4 timing for rk3399
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip vendor code; Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
f2b58f0749
commit
7cf04ad1f6
2 changed files with 9 additions and 9 deletions
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@ -22,16 +22,16 @@
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},
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},
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{
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{
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.ddrtiminga0 = {
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.ddrtiminga0 = {
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0x80241d22,
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0x8010100d,
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},
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},
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.ddrtimingb0 = {
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.ddrtimingb0 = {
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0x15050f08,
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0x08020b04,
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},
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},
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.ddrtimingc0 = {
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.ddrtimingc0 = {
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0x00000602,
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0x00000602,
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},
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},
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.devtodev0 = {
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.devtodev0 = {
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0x00002122,
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0x00002562,
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},
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},
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.ddrmode = {
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.ddrmode = {
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0x0000004c,
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0x0000004c,
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@ -55,16 +55,16 @@
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},
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},
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{
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{
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.ddrtiminga0 = {
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.ddrtiminga0 = {
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0x80241d22,
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0x8010100d,
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},
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},
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.ddrtimingb0 = {
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.ddrtimingb0 = {
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0x15050f08,
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0x08020b04,
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},
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},
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.ddrtimingc0 = {
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.ddrtimingc0 = {
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0x00000602,
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0x00000602,
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},
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},
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.devtodev0 = {
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.devtodev0 = {
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0x00002122,
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0x00002562,
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},
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},
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.ddrmode = {
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.ddrmode = {
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0x0000004c,
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0x0000004c,
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@ -22,16 +22,16 @@
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},
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},
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{
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{
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.ddrtiminga0 = {
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.ddrtiminga0 = {
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0x80241d22,
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0x801c1819,
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},
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},
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.ddrtimingb0 = {
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.ddrtimingb0 = {
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0x15050f08,
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0x10040c05,
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},
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},
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.ddrtimingc0 = {
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.ddrtimingc0 = {
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0x00000602,
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0x00000602,
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},
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},
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.devtodev0 = {
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.devtodev0 = {
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0x00002122,
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0x00002672,
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},
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},
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.ddrmode = {
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.ddrmode = {
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0x0000004c,
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0x0000004c,
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