ram: rockchip: update lpddr4 timing for rk3399

Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2019-11-15 11:04:50 +08:00
parent f2b58f0749
commit 7cf04ad1f6
2 changed files with 9 additions and 9 deletions

View file

@ -22,16 +22,16 @@
}, },
{ {
.ddrtiminga0 = { .ddrtiminga0 = {
0x80241d22, 0x8010100d,
}, },
.ddrtimingb0 = { .ddrtimingb0 = {
0x15050f08, 0x08020b04,
}, },
.ddrtimingc0 = { .ddrtimingc0 = {
0x00000602, 0x00000602,
}, },
.devtodev0 = { .devtodev0 = {
0x00002122, 0x00002562,
}, },
.ddrmode = { .ddrmode = {
0x0000004c, 0x0000004c,
@ -55,16 +55,16 @@
}, },
{ {
.ddrtiminga0 = { .ddrtiminga0 = {
0x80241d22, 0x8010100d,
}, },
.ddrtimingb0 = { .ddrtimingb0 = {
0x15050f08, 0x08020b04,
}, },
.ddrtimingc0 = { .ddrtimingc0 = {
0x00000602, 0x00000602,
}, },
.devtodev0 = { .devtodev0 = {
0x00002122, 0x00002562,
}, },
.ddrmode = { .ddrmode = {
0x0000004c, 0x0000004c,

View file

@ -22,16 +22,16 @@
}, },
{ {
.ddrtiminga0 = { .ddrtiminga0 = {
0x80241d22, 0x801c1819,
}, },
.ddrtimingb0 = { .ddrtimingb0 = {
0x15050f08, 0x10040c05,
}, },
.ddrtimingc0 = { .ddrtimingc0 = {
0x00000602, 0x00000602,
}, },
.devtodev0 = { .devtodev0 = {
0x00002122, 0x00002672,
}, },
.ddrmode = { .ddrmode = {
0x0000004c, 0x0000004c,