Merge branch 'master' of git://git.denx.de/u-boot-spi

This commit is contained in:
Tom Rini 2016-12-23 18:41:32 -05:00
commit 7ceae0eac0
15 changed files with 2 additions and 744 deletions

View file

@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := digsy_mtc.o cmd_mtc.o
obj-y := digsy_mtc.o
obj-$(CONFIG_VIDEO) += cmd_disp.o

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@ -1,369 +0,0 @@
/*
* (C) Copyright 2009
* Werner Pfister <Pfister_Werner@intercontrol.de>
*
* (C) Copyright 2009 Semihalf, Grzegorz Bernacki
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#include <mpc5xxx.h>
#include "spi.h"
#include "cmd_mtc.h"
DECLARE_GLOBAL_DATA_PTR;
static uchar user_out;
static const char *led_names[] = {
"diag",
"can1",
"can2",
"can3",
"can4",
"usbpwr",
"usbbusy",
"user1",
"user2",
""
};
static int msp430_xfer(const void *dout, void *din)
{
int err;
err = spi_xfer(NULL, MTC_TRANSFER_SIZE, dout, din,
SPI_XFER_BEGIN | SPI_XFER_END);
/* The MSP chip needs time to ready itself for the next command */
udelay(1000);
return err;
}
static void mtc_calculate_checksum(tx_msp_cmd *packet)
{
int i;
uchar *buff;
buff = (uchar *) packet;
for (i = 0; i < 6; i++)
packet->cks += buff[i];
}
static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
int i;
if (argc < 2)
return cmd_usage(cmdtp);
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_SET_LED;
pcmd.cmd_val0 = 0xff;
for (i = 0; strlen(led_names[i]) != 0; i++) {
if (strncmp(argv[1], led_names[i], strlen(led_names[i])) == 0) {
pcmd.cmd_val0 = i;
break;
}
}
if (pcmd.cmd_val0 == 0xff) {
printf("Usage:\n%s\n", cmdtp->help);
return -1;
}
if (argc >= 3) {
if (strncmp(argv[2], "red", 3) == 0)
pcmd.cmd_val1 = 1;
else if (strncmp(argv[2], "green", 5) == 0)
pcmd.cmd_val1 = 2;
else if (strncmp(argv[2], "orange", 6) == 0)
pcmd.cmd_val1 = 3;
else
pcmd.cmd_val1 = 0;
}
if (argc >= 4)
pcmd.cmd_val2 = simple_strtol(argv[3], NULL, 10);
else
pcmd.cmd_val2 = 0;
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
return err;
}
static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_GET_VIM;
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
if (!err) {
/* function returns '0' if key is pressed */
err = (prx.input & 0x80) ? 0 : 1;
}
return err;
}
static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
uchar channel_mask = 0;
if (argc < 3)
return cmd_usage(cmdtp);
if (strncmp(argv[1], "on", 2) == 0)
channel_mask |= 1;
if (strncmp(argv[2], "on", 2) == 0)
channel_mask |= 2;
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_GET_VIM;
pcmd.user_out = channel_mask;
user_out = channel_mask;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
return err;
}
static int do_mtc_digin(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
uchar channel_num = 0;
if (argc < 2)
return cmd_usage(cmdtp);
channel_num = simple_strtol(argv[1], NULL, 10);
if ((channel_num != 1) && (channel_num != 2)) {
printf("mtc digin: invalid parameter - must be '1' or '2'\n");
return -1;
}
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_GET_VIM;
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
if (!err) {
/* function returns '0' when digin is on */
err = (prx.input & channel_num) ? 0 : 1;
}
return err;
}
static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
char buf[5];
uchar appreg;
/* read appreg */
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_WD_PARA;
pcmd.cmd_val0 = 5; /* max. Count */
pcmd.cmd_val1 = 5; /* max. Time */
pcmd.cmd_val2 = 0; /* =0 means read appreg */
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
/* on success decide between read or write */
if (!err) {
if (argc == 2) {
appreg = simple_strtol(argv[1], NULL, 10);
if (appreg == 0) {
printf("mtc appreg: invalid parameter - "
"must be between 1 and 255\n");
return -1;
}
memset(&pcmd, 0, sizeof(pcmd));
pcmd.cmd = CMD_WD_PARA;
pcmd.cmd_val0 = prx.ack3; /* max. Count */
pcmd.cmd_val1 = prx.ack0; /* max. Time */
pcmd.cmd_val2 = appreg; /* !=0 means write appreg */
pcmd.user_out = user_out;
memset(&prx, 0, sizeof(prx));
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
} else {
sprintf(buf, "%d", prx.ack2);
setenv("appreg", buf);
}
}
return err;
}
static int do_mtc_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_FW_VERSION;
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
if (!err) {
printf("FW V%d.%d.%d / HW %d\n",
prx.ack0, prx.ack1, prx.ack3, prx.ack2);
}
return err;
}
static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
int err;
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
pcmd.cmd = CMD_WD_WDSTATE;
pcmd.cmd_val2 = 1;
pcmd.user_out = user_out;
mtc_calculate_checksum(&pcmd);
err = msp430_xfer(&pcmd, &prx);
if (!err) {
printf("State %02Xh\n", prx.state);
printf("Input %02Xh\n", prx.input);
printf("UserWD %02Xh\n", prx.ack2);
printf("Sys WD %02Xh\n", prx.ack3);
printf("WD Timout %02Xh\n", prx.ack0);
printf("eSysState %02Xh\n", prx.ack1);
}
return err;
}
static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
cmd_tbl_t cmd_mtc_sub[] = {
U_BOOT_CMD_MKENT(led, 3, 1, do_mtc_led,
"set state of leds",
"[ledname] [state] [blink]\n"
" - lednames: diag can1 can2 can3 can4 usbpwr usbbusy user1 user2\n"
" - state: off red green orange\n"
" - blink: blink interval in 100ms steps (1 - 10; 0 = static)\n"),
U_BOOT_CMD_MKENT(key, 0, 1, do_mtc_key,
"returns state of user key", ""),
U_BOOT_CMD_MKENT(version, 0, 1, do_mtc_version,
"returns firmware version of supervisor uC", ""),
U_BOOT_CMD_MKENT(appreg, 1, 1, do_mtc_appreg,
"reads or writes appreg value and stores in environment "
"variable 'appreg'",
"[value] - value (1 - 255) to write to appreg"),
U_BOOT_CMD_MKENT(digin, 1, 1, do_mtc_digin,
"returns state of digital input",
"<channel_num> - get state of digital input (1 or 2)\n"),
U_BOOT_CMD_MKENT(digout, 2, 1, do_mtc_digout,
"sets digital outputs",
"<on|off> <on|off>- set state of digital output 1 and 2\n"),
U_BOOT_CMD_MKENT(state, 0, 1, do_mtc_state,
"displays state", ""),
U_BOOT_CMD_MKENT(help, 4, 1, do_mtc_help, "get help",
"[command] - get help for command\n"),
};
static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
extern int _do_help(cmd_tbl_t *cmd_start, int cmd_items,
cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[]);
#ifdef CONFIG_SYS_LONGHELP
puts("mtc ");
#endif
return _do_help(&cmd_mtc_sub[0],
ARRAY_SIZE(cmd_mtc_sub), cmdtp, flag, argc, argv);
}
int cmd_mtc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
cmd_tbl_t *c;
int err = 0;
c = find_cmd_tbl(argv[1], &cmd_mtc_sub[0], ARRAY_SIZE(cmd_mtc_sub));
if (c) {
argc--;
argv++;
return c->cmd(c, flag, argc, argv);
} else {
/* Unrecognized command */
return cmd_usage(cmdtp);
}
return err;
}
U_BOOT_CMD(mtc, 5, 1, cmd_mtc,
"special commands for digsyMTC",
"[subcommand] [args...]\n"
"Subcommands list:\n"
"led [ledname] [state] [blink] - set state of leds\n"
" [ledname]: diag can1 can2 can3 can4 usbpwr usbbusy user1 user2\n"
" [state]: off red green orange\n"
" [blink]: blink interval in 100ms steps (1 - 10; 0 = static)\n"
"key - returns state of user key\n"
"version - returns firmware version of supervisor uC\n"
"appreg [value] - reads (in environment variable 'appreg') or writes"
" appreg value\n"
" [value]: value (1 - 255) to write to appreg\n"
"digin [channel] - returns state of digital input (1 or 2)\n"
"digout <on|off> <on|off> - sets state of two digital outputs\n"
"state - displays state\n"
"help [subcommand] - get help for subcommand\n"
);

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@ -1,45 +0,0 @@
/*
* (C) Copyright 2009
* Werner Pfister <Pfister_Werner@intercontrol.de>
*
* (C) Copyright 2009 Semihalf, Grzegorz Bernacki
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef CMD_MTC_H
#define CMD_MTC_H
#define CMD_WD_PARA 0x02
#define CMD_WD_WDSTATE 0x04
#define CMD_FW_VERSION 0x10
#define CMD_GET_VIM 0x30
#define CMD_SET_LED 0x40
typedef struct {
u8 cmd;
u8 sys_in;
u8 cmd_val0;
u8 cmd_val1;
u8 cmd_val2;
u8 user_out;
u8 cks;
u8 dummy1;
u8 dummy2;
} tx_msp_cmd;
typedef struct {
u8 input;
u8 state;
u8 ack2;
u8 ack3;
u8 ack0;
u8 ack1;
u8 ack;
u8 dummy;
u8 cks;
} rx_msp_cmd;
#define MTC_TRANSFER_SIZE (sizeof(tx_msp_cmd) * 8)
#endif

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@ -250,9 +250,6 @@ static inline void exbo_hw_init(void) {}
int board_early_init_r(void)
{
#ifdef CONFIG_MPC52XX_SPI
struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt*)MPC5XXX_GPT;
#endif
/*
* Now, when we are in RAM, enable flash write access for detection
* process. Note that CS_BOOT cannot be cleared when executing in
@ -269,12 +266,6 @@ int board_early_init_r(void)
/* Low level USB init, required for proper kernel operation */
usb_cpu_init();
#endif
#ifdef CONFIG_MPC52XX_SPI
/* GPT 6 Output Enable */
out_be32(&gpt[6].emsr, 0x00000034);
/* GPT 7 Output Enable */
out_be32(&gpt[7].emsr, 0x00000034);
#endif
return (0);
}

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@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_LOOPW=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

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@ -11,7 +11,6 @@ CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR=" "
CONFIG_LOOPW=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

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@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_LOOPW=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

View file

@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_LOOPW=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

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@ -4,9 +4,7 @@ CONFIG_IDENT_STRING="\nMarvell-gplugD"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
@ -16,9 +14,6 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

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@ -16,7 +16,6 @@ obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
endif
obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
obj-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
@ -35,7 +34,6 @@ obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
obj-$(CONFIG_ICH_SPI) += ich.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
obj-$(CONFIG_MXC_SPI) += mxc_spi.o

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@ -1,203 +0,0 @@
/*
* (C) Copyright 2011
* eInfochips Ltd. <www.einfochips.com>
* Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Based on SSP driver
* Written-by: Lei Wen <leiwen@marvell.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <malloc.h>
#include <spi.h>
#include <asm/io.h>
#include <asm/arch/spi.h>
#include <asm/gpio.h>
#define to_armd_spi_slave(s) container_of(s, struct armd_spi_slave, slave)
struct armd_spi_slave {
struct spi_slave slave;
struct ssp_reg *spi_reg;
u32 cr0, cr1;
u32 int_cr1;
u32 clear_sr;
const void *tx;
void *rx;
int gpio_cs_inverted;
};
static int spi_armd_write(struct armd_spi_slave *pss)
{
int wait_timeout = SSP_FLUSH_NUM;
while (--wait_timeout && !(readl(&pss->spi_reg->sssr) & SSSR_TNF))
;
if (!wait_timeout) {
debug("%s: timeout error\n", __func__);
return -1;
}
if (pss->tx != NULL) {
writel(*(u8 *)pss->tx, &pss->spi_reg->ssdr);
++pss->tx;
} else {
writel(0, &pss->spi_reg->ssdr);
}
return 0;
}
static int spi_armd_read(struct armd_spi_slave *pss)
{
int wait_timeout = SSP_FLUSH_NUM;
while (--wait_timeout && !(readl(&pss->spi_reg->sssr) & SSSR_RNE))
;
if (!wait_timeout) {
debug("%s: timeout error\n", __func__);
return -1;
}
if (pss->rx != NULL) {
*(u8 *)pss->rx = readl(&pss->spi_reg->ssdr);
++pss->rx;
} else {
readl(&pss->spi_reg->ssdr);
}
return 0;
}
static int spi_armd_flush(struct armd_spi_slave *pss)
{
unsigned long limit = SSP_FLUSH_NUM;
do {
while (readl(&pss->spi_reg->sssr) & SSSR_RNE)
readl(&pss->spi_reg->ssdr);
} while ((readl(&pss->spi_reg->sssr) & SSSR_BSY) && limit--);
writel(SSSR_ROR, &pss->spi_reg->sssr);
return limit;
}
void spi_cs_activate(struct spi_slave *slave)
{
struct armd_spi_slave *pss = to_armd_spi_slave(slave);
gpio_set_value(slave->cs, pss->gpio_cs_inverted);
}
void spi_cs_deactivate(struct spi_slave *slave)
{
struct armd_spi_slave *pss = to_armd_spi_slave(slave);
gpio_set_value(slave->cs, !pss->gpio_cs_inverted);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct armd_spi_slave *pss;
pss = spi_alloc_slave(struct armd_spi_slave, bus, cs);
if (!pss)
return NULL;
pss->spi_reg = (struct ssp_reg *)SSP_REG_BASE(CONFIG_SYS_SSP_PORT);
pss->cr0 = SSCR0_MOTO | SSCR0_DATASIZE(DEFAULT_WORD_LEN) | SSCR0_SSE;
pss->cr1 = (SSCR1_RXTRESH(RX_THRESH_DEF) & SSCR1_RFT) |
(SSCR1_TXTRESH(TX_THRESH_DEF) & SSCR1_TFT);
pss->cr1 &= ~(SSCR1_SPO | SSCR1_SPH);
pss->cr1 |= (((mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0)
| (((mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0);
pss->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE;
pss->clear_sr = SSSR_ROR | SSSR_TINT;
pss->gpio_cs_inverted = mode & SPI_CS_HIGH;
gpio_set_value(cs, !pss->gpio_cs_inverted);
return &pss->slave;
}
void spi_free_slave(struct spi_slave *slave)
{
struct armd_spi_slave *pss = to_armd_spi_slave(slave);
free(pss);
}
int spi_claim_bus(struct spi_slave *slave)
{
struct armd_spi_slave *pss = to_armd_spi_slave(slave);
debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
if (spi_armd_flush(pss) == 0)
return -1;
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
struct armd_spi_slave *pss = to_armd_spi_slave(slave);
uint bytes = bitlen / 8;
unsigned long limit;
int ret = 0;
if (bitlen == 0)
goto done;
/* we can only do 8 bit transfers */
if (bitlen % 8) {
flags |= SPI_XFER_END;
goto done;
}
pss->tx = dout;
pss->rx = din;
if (flags & SPI_XFER_BEGIN) {
spi_cs_activate(slave);
writel(pss->cr1 | pss->int_cr1, &pss->spi_reg->sscr1);
writel(TIMEOUT_DEF, &pss->spi_reg->ssto);
writel(pss->cr0, &pss->spi_reg->sscr0);
}
while (bytes--) {
limit = SSP_FLUSH_NUM;
ret = spi_armd_write(pss);
if (ret)
break;
while ((readl(&pss->spi_reg->sssr) & SSSR_BSY) && limit--)
udelay(1);
ret = spi_armd_read(pss);
if (ret)
break;
}
done:
if (flags & SPI_XFER_END) {
/* Stop SSP */
writel(pss->clear_sr, &pss->spi_reg->sssr);
clrbits_le32(&pss->spi_reg->sscr1, pss->int_cr1);
writel(0, &pss->spi_reg->ssto);
spi_cs_deactivate(slave);
}
return ret;
}

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@ -1,90 +0,0 @@
/*
* (C) Copyright 2009
* Frank Bodammer <frank.bodammer@gcd-solutions.de>
* (C) Copyright 2009 Semihalf, Grzegorz Bernacki
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <spi.h>
#include <mpc5xxx.h>
void spi_init(void)
{
struct mpc5xxx_spi *spi = (struct mpc5xxx_spi *)MPC5XXX_SPI;
/*
* Its important to use the correct order when initializing the
* registers
*/
out_8(&spi->ddr, 0x0F); /* set all SPI pins as output */
out_8(&spi->pdr, 0x00); /* set SS low */
/* SPI is master, SS is general purpose output */
out_8(&spi->cr1, SPI_CR_MSTR | SPI_CR_SPE);
out_8(&spi->cr2, 0x00); /* normal operation */
out_8(&spi->brr, 0x77); /* baud rate: IPB clock / 2048 */
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct spi_slave *slave;
slave = spi_alloc_slave_base(bus, cs);
if (!slave)
return NULL;
return slave;
}
void spi_free_slave(struct spi_slave *slave)
{
free(slave);
}
int spi_claim_bus(struct spi_slave *slave)
{
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
return;
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
struct mpc5xxx_spi *spi = (struct mpc5xxx_spi *)MPC5XXX_SPI;
int i, iter = bitlen >> 3;
const uchar *txp = dout;
uchar *rxp = din;
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
if (flags & SPI_XFER_BEGIN)
setbits_8(&spi->pdr, SPI_PDR_SS);
for (i = 0; i < iter; i++) {
udelay(1000);
debug("spi_xfer: sending %x\n", txp[i]);
out_8(&spi->dr, txp[i]);
while (!(in_8(&spi->sr) & SPI_SR_SPIF)) {
udelay(1000);
if (in_8(&spi->sr) & SPI_SR_WCOL) {
rxp[i] = in_8(&spi->dr);
puts("spi_xfer: write collision\n");
return -1;
}
}
rxp[i] = in_8(&spi->dr);
debug("spi_xfer: received %x\n", rxp[i]);
}
if (flags & SPI_XFER_END)
clrbits_8(&spi->pdr, SPI_PDR_SS);
return 0;
}

View file

@ -215,12 +215,6 @@
#define CONFIG_BOOTCOMMAND "run mtcb_start"
/*
* SPI configuration
*/
#define CONFIG_HARD_SPI 1
#define CONFIG_MPC52XX_SPI 1
/*
* I2C configuration
*/

View file

@ -72,11 +72,6 @@
/* GPIO Configuration for PHY */
#define CONFIG_SYS_GPIO_PHY_RST 104 /* GPIO104 */
/* SPI Support */
#define CONFIG_ARMADA100_SPI
#define CONFIG_ENV_SPI_CS 110
#define CONFIG_SYS_SSP_PORT 2
/* Flash Support */
/*
@ -95,10 +90,8 @@
/*
* Environment variables configurations
*/
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SECT_SIZE 0x4000
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x4000
#define CONFIG_ENV_OFFSET 0x07C000
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI

View file

@ -176,7 +176,6 @@ CONFIG_ARIA_FPGA
CONFIG_ARM926EJS
CONFIG_ARMADA100
CONFIG_ARMADA100_FEC
CONFIG_ARMADA100_SPI
CONFIG_ARMADA168
CONFIG_ARMADA_39X
CONFIG_ARMCORTEXA9
@ -3095,7 +3094,6 @@ CONFIG_MPC5121ADS_REV2
CONFIG_MPC512x_FEC
CONFIG_MPC5200
CONFIG_MPC5200_DDR
CONFIG_MPC52XX_SPI
CONFIG_MPC555
CONFIG_MPC5xxx_FEC
CONFIG_MPC5xxx_FEC_MII10