powerpc/km: remove unmaintained target KMVECT1

Signed-off-by: Valentin Longchamp <valentin.longchamp@ch.abb.com>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Holger Brunck 2019-07-09 09:30:29 +02:00 committed by Stefan Roese
parent 1bd17b9f7b
commit 7b472733d8
8 changed files with 0 additions and 348 deletions

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@ -110,10 +110,6 @@ config TARGET_SUVD3
bool "Support suvd3" bool "Support suvd3"
select VENDOR_KM select VENDOR_KM
config TARGET_KMVECT1
bool "Support kmvect1"
select VENDOR_KM
config TARGET_KMTEGR1 config TARGET_KMTEGR1
bool "Support kmtegr1" bool "Support kmtegr1"
select VENDOR_KM select VENDOR_KM

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@ -310,11 +310,6 @@ static int ivm_populate_env(unsigned char *buf, int len)
/* if an offset is defined, add it */ /* if an offset is defined, add it */
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true);
env_set((char *)"ethaddr", (char *)valbuf); env_set((char *)"ethaddr", (char *)valbuf);
#ifdef CONFIG_KMVECT1
/* KMVECT1 has two ethernet interfaces */
process_mac(valbuf, page2, 1, true);
env_set((char *)"eth1addr", (char *)valbuf);
#endif
#else #else
/* KMTEGR1 has a special setup. eth0 has no connection to the outside and /* KMTEGR1 has a special setup. eth0 has no connection to the outside and
* gets an locally administred MAC address, eth1 is the debug interface and * gets an locally administred MAC address, eth1 is the debug interface and

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@ -38,25 +38,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
endif endif
if TARGET_KMVECT1
config SYS_BOARD
default "km83xx"
config SYS_VENDOR
default "keymile"
config SYS_CONFIG_NAME
default "kmvect1"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_MPC8309
imply CMD_CRAMFS
imply FS_CRAMFS
endif
if TARGET_KMTEGR1 if TARGET_KMTEGR1
config SYS_BOARD config SYS_BOARD

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@ -10,7 +10,6 @@ F: configs/kmopti2_defconfig
F: configs/kmtepr2_defconfig F: configs/kmtepr2_defconfig
F: include/configs/suvd3.h F: include/configs/suvd3.h
F: configs/kmtegr1_defconfig F: configs/kmtegr1_defconfig
F: configs/kmvect1_defconfig
F: configs/suvd3_defconfig F: configs/suvd3_defconfig
F: configs/tuge1_defconfig F: configs/tuge1_defconfig
F: configs/tuxx1_defconfig F: configs/tuxx1_defconfig

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@ -124,19 +124,10 @@ static int piggy_present(void)
return in_8(&base->bprth) & PIGGY_PRESENT; return in_8(&base->bprth) & PIGGY_PRESENT;
} }
#if defined(CONFIG_KMVECT1)
int ethernet_present(void)
{
/* ethernet port connected to simple switch without piggy */
return 1;
}
#else
int ethernet_present(void) int ethernet_present(void)
{ {
return piggy_present(); return piggy_present();
} }
#endif
int board_early_init_r(void) int board_early_init_r(void)
{ {
@ -197,80 +188,8 @@ int misc_init_r(void)
return 0; return 0;
} }
#if defined(CONFIG_KMVECT1)
#include <mv88e6352.h>
/* Marvell MV88E6122 switch configuration */
static struct mv88e_sw_reg extsw_conf[] = {
/* port 1, FRONT_MDI, autoneg */
{ PORT(1), PORT_PHY, NO_SPEED_FOR },
{ PORT(1), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
{ PHY(1), PHY_1000_CTRL, NO_ADV },
{ PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN },
{ PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
FULL_DUPLEX },
/* port 2, unused */
{ PORT(2), PORT_CTRL, PORT_DIS },
{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
/* port 3, BP_MII (CPU), PHY mode, 100BASE */
{ PORT(3), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
/* port 4, ESTAR to slot 11, SerDes, 1000BASE-X */
{ PORT(4), PORT_STATUS, NO_PHY_DETECT },
{ PORT(4), PORT_PHY, SPEED_1000_FOR },
{ PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
/* port 5, ESTAR to slot 13, SerDes, 1000BASE-X */
{ PORT(5), PORT_STATUS, NO_PHY_DETECT },
{ PORT(5), PORT_PHY, SPEED_1000_FOR },
{ PORT(5), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
/*
* Errata Fix: 1.9V Output from Internal 1.8V Regulator,
* acc . MV-S300889-00D.pdf , clause 4.5
*/
{ PORT(5), 0x1A, 0xADB1 },
/* port 6, unused, this port has no phy */
{ PORT(6), PORT_CTRL, PORT_DIS },
/*
* Errata Fix: 1.9V Output from Internal 1.8V Regulator,
* acc . MV-S300889-00D.pdf , clause 4.5
*/
{ PORT(5), 0x1A, 0xADB1 },
};
#endif
int last_stage_init(void) int last_stage_init(void)
{ {
#if defined(CONFIG_KMVECT1)
struct km_bec_fpga __iomem *base =
(struct km_bec_fpga __iomem *)CONFIG_SYS_KMBEC_FPGA_BASE;
u8 tmp_reg;
/* Release mv88e6122 from reset */
tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */
out_8(&base->res1[0], tmp_reg); /* GP28 as output */
tmp_reg = in_8(&base->gprt3) | 0x10; /* GP28 to high */
out_8(&base->gprt3, tmp_reg);
/* configure MV88E6122 switch */
char *name = "UEC2";
if (miiphy_set_current_dev(name))
return 0;
mv88e_sw_program(name, CONFIG_KM_MVEXTSW_ADDR, extsw_conf,
ARRAY_SIZE(extsw_conf));
mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR);
if (piggy_present()) {
env_set("ethact", "UEC2");
env_set("netdev", "eth1");
puts("using PIGGY for network boot\n");
} else {
env_set("netdev", "eth0");
puts("using frontport for network boot\n");
}
#endif
#if defined(CONFIG_TARGET_KMCOGE5NE) #if defined(CONFIG_TARGET_KMCOGE5NE)
struct bfticu_iomap *base = struct bfticu_iomap *base =
(struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE; (struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE;

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@ -1,181 +0,0 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMVECT1=y
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_BAT0=y
CONFIG_BAT0_NAME="SDRAM"
CONFIG_BAT0_BASE=0x00000000
CONFIG_BAT0_LENGTH_256_MBYTES=y
CONFIG_BAT0_ACCESS_RW=y
CONFIG_BAT0_ICACHE_INHIBITED=y
CONFIG_BAT0_ICACHE_GUARDED=y
CONFIG_BAT0_DCACHE_INHIBITED=y
CONFIG_BAT0_DCACHE_GUARDED=y
CONFIG_BAT0_USER_MODE_VALID=y
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
CONFIG_BAT1=y
CONFIG_BAT1_NAME="IMMR"
CONFIG_BAT1_BASE=0xE0000000
CONFIG_BAT1_LENGTH_4_MBYTES=y
CONFIG_BAT1_ACCESS_RW=y
CONFIG_BAT1_ICACHE_INHIBITED=y
CONFIG_BAT1_ICACHE_GUARDED=y
CONFIG_BAT1_DCACHE_INHIBITED=y
CONFIG_BAT1_DCACHE_GUARDED=y
CONFIG_BAT1_USER_MODE_VALID=y
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
CONFIG_BAT2=y
CONFIG_BAT2_NAME="KMBEC_FPGA"
CONFIG_BAT2_BASE=0xE8000000
CONFIG_BAT2_LENGTH_128_MBYTES=y
CONFIG_BAT2_ACCESS_RW=y
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT2_DCACHE_INHIBITED=y
CONFIG_BAT2_DCACHE_GUARDED=y
CONFIG_BAT2_USER_MODE_VALID=y
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
CONFIG_BAT3=y
CONFIG_BAT3_NAME="FLASH"
CONFIG_BAT3_BASE=0xF0000000
CONFIG_BAT3_LENGTH_256_MBYTES=y
CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT3_DCACHE_INHIBITED=y
CONFIG_BAT3_DCACHE_GUARDED=y
CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_BAT4=y
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
CONFIG_BAT4_BASE=0xE6000000
CONFIG_BAT4_ACCESS_RW=y
CONFIG_BAT4_USER_MODE_VALID=y
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
CONFIG_BAT5=y
CONFIG_BAT5_NAME="APP1"
CONFIG_BAT5_BASE=0xA0000000
CONFIG_BAT5_LENGTH_256_MBYTES=y
CONFIG_BAT5_ACCESS_RW=y
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT5_DCACHE_INHIBITED=y
CONFIG_BAT5_DCACHE_GUARDED=y
CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_BAT6=y
CONFIG_BAT6_NAME="APP2"
CONFIG_BAT6_BASE=0xB0000000
CONFIG_BAT6_LENGTH_256_MBYTES=y
CONFIG_BAT6_ACCESS_RW=y
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_ELBC_BR0_OR0=y
CONFIG_BR0_OR0_NAME="FLASH"
CONFIG_BR0_OR0_BASE=0xF0000000
CONFIG_BR0_PORTSIZE_16BIT=y
CONFIG_OR0_AM_256_MBYTES=y
CONFIG_OR0_SCY_5=y
CONFIG_OR0_CSNT_EARLIER=y
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
CONFIG_OR0_TRLX_RELAXED=y
CONFIG_OR0_EAD_EXTRA=y
CONFIG_ELBC_BR1_OR1=y
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
CONFIG_BR1_OR1_BASE=0xE8000000
CONFIG_OR1_AM_128_MBYTES=y
CONFIG_OR1_SCY_2=y
CONFIG_OR1_CSNT_EARLIER=y
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
CONFIG_OR1_TRLX_RELAXED=y
CONFIG_OR1_EAD_EXTRA=y
CONFIG_ELBC_BR2_OR2=y
CONFIG_BR2_OR2_NAME="APP1"
CONFIG_BR2_OR2_BASE=0xA0000000
CONFIG_BR2_PORTSIZE_16BIT=y
CONFIG_BR2_MACHINE_UPMA=y
CONFIG_OR2_AM_256_MBYTES=y
CONFIG_ELBC_BR3_OR3=y
CONFIG_BR3_OR3_NAME="APP2"
CONFIG_BR3_OR3_BASE=0xB0000000
CONFIG_BR3_PORTSIZE_16BIT=y
CONFIG_OR3_AM_256_MBYTES=y
CONFIG_OR3_SCY_3=y
CONFIG_OR3_CSNT_EARLIER=y
CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
CONFIG_OR3_TRLX_RELAXED=y
CONFIG_HID0_FINAL_EMCP=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
CONFIG_ACR_PIPE_DEP_4=y
CONFIG_ACR_RPTCNT_4=y
CONFIG_ACR_APARK_MASTER=y
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
CONFIG_MISC_INIT_R=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=boot"
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MV88E6352_SWITCH=y
# CONFIG_PCI is not set
CONFIG_QE=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y

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@ -1,56 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2006 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*
* Copyright (C) 2007 Logic Product Development, Inc.
* Peter Barada <peterb@logicpd.com>
*
* Copyright (C) 2007 MontaVista Software, Inc.
* Anton Vorontsov <avorontsov@ru.mvista.com>
*
* (C) Copyright 2010
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
*/
#define CONFIG_HOSTNAME "kmvect1"
#define CONFIG_KM_BOARD_NAME "kmvect1"
/* at end of uboot partition, before env */
#define CONFIG_SYS_QE_FW_ADDR 0xF00B0000
/* include common defines/options for all Keymile boards */
#include "km/keymile-common.h"
#include "km/km-powerpc.h"
#include "km/km-mpc83xx.h"
#include "km/km-mpc8309.h"
#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
0x0000c000 | \
MxMR_WLFx_2X)
/* ethernet port connected to simple switch 88e6122 (UEC0) */
#define CONFIG_UEC_ETH1
#define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */
#define CONFIG_SYS_UEC1_RX_CLK QE_CLK9
#define CONFIG_SYS_UEC1_TX_CLK QE_CLK10
#define CONFIG_FIXED_PHY 0xFFFFFFFF
#define CONFIG_SYS_FIXED_PHY_ADDR 0x1E /* unused address */
#define CONFIG_SYS_FIXED_PHY_PORT(devnum, speed, duplex) \
{devnum, speed, duplex}
#define CONFIG_SYS_FIXED_PHY_PORTS \
CONFIG_SYS_FIXED_PHY_PORT("UEC0", SPEED_100, DUPLEX_FULL)
#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH
#define CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_FIXED_PHY_ADDR
#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100
#endif /* __CONFIG_H */

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@ -949,7 +949,6 @@ CONFIG_KMCOGE4
CONFIG_KMLION1 CONFIG_KMLION1
CONFIG_KMP204X CONFIG_KMP204X
CONFIG_KMTEGR1 CONFIG_KMTEGR1
CONFIG_KMVECT1
CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_BOARD_EXTRA_ENV
CONFIG_KM_BOARD_NAME CONFIG_KM_BOARD_NAME
CONFIG_KM_COGE5UN CONFIG_KM_COGE5UN