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Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c

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Patch by Stefan Roese, 24 Oct 2006
This commit is contained in:
Stefan Roese 2006-10-24 18:06:48 +02:00
parent 8ae3b713b2
commit 7ade0c634a
2 changed files with 12 additions and 4 deletions
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3
CHANGELOG
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@ -4,6 +4,9 @@ Changes for U-Boot 1.1.5:
* Fix sequoia separate object direcory building problems. * Fix sequoia separate object direcory building problems.
* Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c
Patch by Stefan Roese, 24 Oct 2006
* Cleanup compile warnings. Prepare for release 1.1.5 * Cleanup compile warnings. Prepare for release 1.1.5
* Fix compile problem in include/configs/ep82xxm.h * Fix compile problem in include/configs/ep82xxm.h

13
cpu/ppc4xx/ndfc.c
View file

@ -144,16 +144,21 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
void board_nand_select_device(struct nand_chip *nand, int chip) void board_nand_select_device(struct nand_chip *nand, int chip)
{ {
/*
* Don't use "chip" to address the NAND device,
* generate the cs from the address where it is encoded.
*/
int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
/* Set NandFlash Core Configuration Register */ /* Set NandFlash Core Configuration Register */
/* 1col x 2 rows */ /* 1col x 2 rows */
out32(base + NDFC_CCR, 0x00000000 | (chip << 24)); out32(base + NDFC_CCR, 0x00000000 | (cs << 24));
} }
void board_nand_init(struct nand_chip *nand) void board_nand_init(struct nand_chip *nand)
{ {
int chip = (ulong)nand->IO_ADDR_W & 0x00000003; int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
nand->eccmode = NAND_ECC_SOFT; nand->eccmode = NAND_ECC_SOFT;
@ -181,8 +186,8 @@ void board_nand_init(struct nand_chip *nand)
/* /*
* Select required NAND chip in NDFC * Select required NAND chip in NDFC
*/ */
board_nand_select_device(nand, chip); board_nand_select_device(nand, cs);
out32(base + NDFC_BCFG0 + (chip << 2), 0x80002222); out32(base + NDFC_BCFG0 + (cs << 2), 0x80002222);
} }
#endif #endif