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Fixup sc520_spunk board
Primary intent is to resolve build errors for this board which has been neglected for a very long time. I do not have one of these boards, so I cannot test functionality Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This commit is contained in:
parent
3ae184dd48
commit
7a17d13cbd
2 changed files with 33 additions and 2 deletions
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@ -24,11 +24,13 @@
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#include <common.h>
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#include <common.h>
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#include <pci.h>
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#include <pci.h>
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#include <ssi.h>
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#include <netdev.h>
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#include <netdev.h>
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#include <ds1722.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#include <asm/pci.h>
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#include <asm/ic/sc520.h>
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#include <asm/ic/sc520.h>
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#include <asm/ic/pci.h>
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#include <asm/ic/ssi.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -112,7 +114,7 @@ static void pci_sc520_spunk_fixup_irq(struct pci_controller *hose, pci_dev_t dev
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};
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};
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static int next_irq_index=0;
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static int next_irq_index=0;
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char tmp_pin;
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uchar tmp_pin;
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int pin;
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int pin;
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pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
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pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
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@ -637,6 +639,33 @@ void ssi_chip_select(int dev)
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}
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}
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}
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}
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void spi_eeprom_probe(int x)
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{
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}
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int spi_eeprom_read(int x, int offset, uchar *buffer, int len)
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{
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return 0;
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}
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int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
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{
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return 0;
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}
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void mw_eeprom_probe(int x)
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{
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}
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int mw_eeprom_read(int x, int offset, uchar *buffer, int len)
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{
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return 0;
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}
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int mw_eeprom_write(int x, int offset, uchar *buffer, int len)
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{
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return 0;
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}
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void spi_init_f(void)
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void spi_init_f(void)
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{
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{
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@ -37,6 +37,7 @@
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#define CONFIG_X86 1 /* This is a X86 CPU */
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#define CONFIG_X86 1 /* This is a X86 CPU */
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#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
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#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
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#define CONFIG_SYS_SC520_SSI
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#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
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#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
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#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
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#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
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@ -218,6 +219,7 @@
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#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000
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#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000
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#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000
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#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000
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#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16
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#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16
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#define CONFIG_PCMCIA_SLOT_A /* TODO: Check this */
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/************************************************************
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/************************************************************
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* DISK Partition support
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* DISK Partition support
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