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mmc: dwmmc: Poll for iDMAC TX/RX interrupt

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Poll for iDMAC TX/RX interrupt before disable DMA.
This to prevent disable DMA before data is transfer
completed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Ley Foon Tan 2018-12-20 17:55:41 +08:00 committed by Marek Vasut
parent 473f55676a
commit 7997599e2d
2 changed files with 26 additions and 0 deletions
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19
drivers/mmc/dw_mmc.c
View file

@ -12,6 +12,7 @@
#include <memalign.h> #include <memalign.h>
#include <mmc.h> #include <mmc.h>
#include <dwmmc.h> #include <dwmmc.h>
#include <wait_bit.h>
#define PAGE_SIZE 4096 #define PAGE_SIZE 4096
@ -55,6 +56,9 @@ static void dwmci_prepare_data(struct dwmci_host *host,
dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
/* Clear IDMAC interrupt */
dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF);
data_start = (ulong)cur_idmac; data_start = (ulong)cur_idmac;
dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac);
@ -340,6 +344,18 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
/* only dma mode need it */ /* only dma mode need it */
if (!host->fifo_mode) { if (!host->fifo_mode) {
if (data->flags == MMC_DATA_READ)
mask = DWMCI_IDINTEN_RI;
else
mask = DWMCI_IDINTEN_TI;
ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS,
mask, true, 1000, false);
if (ret)
debug("%s: DWMCI_IDINTEN mask 0x%x timeout.\n",
__func__, mask);
/* clear interrupts */
dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK);
ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl = dwmci_readl(host, DWMCI_CTRL);
ctrl &= ~(DWMCI_DMA_EN); ctrl &= ~(DWMCI_DMA_EN);
dwmci_writel(host, DWMCI_CTRL, ctrl); dwmci_writel(host, DWMCI_CTRL, ctrl);
@ -494,6 +510,9 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKENA, 0);
dwmci_writel(host, DWMCI_CLKSRC, 0); dwmci_writel(host, DWMCI_CLKSRC, 0);
if (!host->fifo_mode)
dwmci_writel(host, DWMCI_IDINTEN, DWMCI_IDINTEN_MASK);
return 0; return 0;
} }

7
include/dwmmc.h
View file

@ -130,6 +130,13 @@
/* UHS register */ /* UHS register */
#define DWMCI_DDR_MODE (1 << 16) #define DWMCI_DDR_MODE (1 << 16)
/* Internal IDMAC interrupt defines */
#define DWMCI_IDINTEN_RI BIT(1)
#define DWMCI_IDINTEN_TI BIT(0)
#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \
DWMCI_IDINTEN_RI)
/* quirks */ /* quirks */
#define DWMCI_QUIRK_DISABLE_SMU (1 << 0) #define DWMCI_QUIRK_DISABLE_SMU (1 << 0)