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Merge branch 'r-ml-master' into t-master

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This commit is contained in:
Tom Rix 2010-01-23 07:22:23 -06:00
commit 790af6ed08
41 changed files with 1314 additions and 86 deletions
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2
MAINTAINERS
View file

@ -697,7 +697,7 @@ Stefan Roese <sr@denx.de>
Alessandro Rubini <rubini@unipv.it>
Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
nmdk8815 ARM926EJS (Nomadik 8815 Soc)
nhk8815 ARM926EJS (Nomadik 8815 Soc)
Steve Sakoman <sakoman@gmail.com>

16
Makefile
View file

@ -398,8 +398,11 @@ updater:
env:
$(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
for dir in $(SUBDIRS) cpu/$(CPU) $(dir $(LDSCRIPT)) ; do \
$(MAKE) -C $$dir _depend ; done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))
@ -448,10 +451,15 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
$(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \
dep tags ctags etags cscope $(obj)System.map:
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools \
updater env depend dep tags ctags etags cscope $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
tools:
$(MAKE) -C tools
tools-all:
$(MAKE) -C tools HOST_TOOLS_ALL=y
endif # config.mk
.PHONY : CHANGELOG
@ -2703,7 +2711,7 @@ mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
#########################################################################
## Atmel ARM926EJ-S Systems
## ARM926EJ-S Systems
#########################################################################
afeb9260_config: unconfig

34
common/cmd_bootm.c
View file

@ -153,18 +153,6 @@ static boot_os_fn *boot_os[] = {
ulong load_addr = CONFIG_SYS_LOAD_ADDR; /* Default Load Address */
static bootm_headers_t images; /* pointers to os/initrd/fdt images */
void __board_lmb_reserve(struct lmb *lmb)
{
/* please define platform specific board_lmb_reserve() */
}
void board_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__board_lmb_reserve")));
void __arch_lmb_reserve(struct lmb *lmb)
{
/* please define platform specific arch_lmb_reserve() */
}
void arch_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__arch_lmb_reserve")));
/* Allow for arch specific config before we boot */
void __arch_preboot_os(void)
{
@ -200,15 +188,11 @@ void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os")));
# error Unknown CPU type
#endif
static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
static void bootm_start_lmb(void)
{
#ifdef CONFIG_LMB
ulong mem_start;
phys_size_t mem_size;
void *os_hdr;
int ret;
memset ((void *)&images, 0, sizeof (images));
images.verify = getenv_yesno ("verify");
lmb_init(&images.lmb);
@ -219,6 +203,20 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
arch_lmb_reserve(&images.lmb);
board_lmb_reserve(&images.lmb);
#else
# define lmb_reserve(lmb, base, size)
#endif
}
static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
void *os_hdr;
int ret;
memset ((void *)&images, 0, sizeof (images));
images.verify = getenv_yesno ("verify");
bootm_start_lmb();
/* get kernel image header, start address and length */
os_hdr = boot_get_kernel (cmdtp, flag, argc, argv,

105
cpu/blackfin/interrupt.S
View file

@ -8,6 +8,9 @@
#include <config.h>
#include <asm/blackfin.h>
#include <asm/entry.h>
#include <asm/ptrace.h>
#include <asm/deferred.h>
#include <asm/mach-common/bits/core.h>
.text
@ -19,10 +22,75 @@ ENTRY(_trap)
SAVE_ALL_SYS
r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
r1 = 3; /* EVT3 space */
sp += -12;
call _trap_c;
sp += 12;
#ifdef CONFIG_EXCEPTION_DEFER
CC = R0 == 0;
IF CC JUMP .Lexit_trap;
/* To avoid double faults, lower our priority to IRQ5 */
p4.l = lo(COREMMR_BASE);
p4.h = hi(COREMMR_BASE);
r7.h = _exception_to_level5;
r7.l = _exception_to_level5;
[p4 + (EVT5 - COREMMR_BASE)] = r7;
/*
* Save these registers, as they are only valid in exception context
* (where we are now - as soon as we defer to IRQ5, they can change)
*/
p5.l = _deferred_regs;
p5.h = _deferred_regs;
r6 = [p4 + (DCPLB_FAULT_ADDR - COREMMR_BASE)];
[p5 + (deferred_regs_DCPLB_FAULT_ADDR * 4)] = r6;
r6 = [p4 + (ICPLB_FAULT_ADDR - COREMMR_BASE)];
[p5 + (deferred_regs_ICPLB_FAULT_ADDR * 4)] = r6;
/* Save the state of single stepping */
r6 = SYSCFG;
[p5 + (deferred_regs_SYSCFG * 4)] = r6;
/* Clear it while we handle the exception in IRQ5 mode
* RESTORE_ALL_SYS will load it, so all we need to do is store it
* in the right place
*/
BITCLR(r6, SYSCFG_SSSTEP_P);
[SP + PT_SYSCFG] = r6;
/* Since we are going to clobber RETX, we need to save it */
r6 = retx;
[p5 + (deferred_regs_retx * 4)] = r6;
/* Save the current IMASK, since we change in order to jump to level 5 */
cli r6;
[p5 + (deferred_regs_IMASK * 4)] = r6;
/* Disable all interrupts, but make sure level 5 is enabled so
* we can switch to that level.
*/
r6 = 0x3f;
sti r6;
/* Clobber RETX so we don't end up back at a faulting instruction */
[sp + PT_RETX] = r7;
/* In case interrupts are disabled IPEND[4] (global interrupt disable bit)
* clear it (re-enabling interrupts again) by the special sequence of pushing
* RETI onto the stack. This way we can lower ourselves to IVG5 even if the
* exception was taken after the interrupt handler was called but before it
* got a chance to enable global interrupts itself.
*/
[--sp] = reti;
sp += 4;
RAISE 5;
.Lexit_trap:
#endif
#if ANOMALY_05000257
R7 = LC0;
LC0 = R7;
@ -35,6 +103,43 @@ ENTRY(_trap)
rtx;
ENDPROC(_trap)
#ifdef CONFIG_EXCEPTION_DEFER
/* Deferred (IRQ5) exceptions */
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
/* Now we have to fix things up */
p4.l = lo(EVT5);
p4.h = hi(EVT5);
r0.l = _evt_default;
r0.h = _evt_default;
[p4] = r0;
csync;
p4.l = _deferred_regs;
p4.h = _deferred_regs;
r0 = [p4 + (deferred_regs_retx * 4)];
[sp + PT_PC] = r0;
r0 = [p4 + (deferred_regs_SYSCFG * 4)];
[sp + PT_SYSCFG] = r0;
r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
r1 = 5; /* EVT5 space */
sp += -12;
call _trap_c;
sp += 12;
/* Restore IMASK */
r0 = [p4 + (deferred_regs_IMASK * 4)];
sti r0;
RESTORE_ALL_SYS
rti;
ENDPROC(_exception_to_level5)
#endif
/* default entry point for interrupts */
ENTRY(_evt_default)
SAVE_ALL_SYS

57
cpu/blackfin/traps.c
View file

@ -18,6 +18,7 @@
*/
#include <common.h>
#include <kgdb.h>
#include <linux/types.h>
#include <asm/traps.h>
#include <asm/cplb.h>
@ -25,6 +26,7 @@
#include <asm/mach-common/bits/core.h>
#include <asm/mach-common/bits/mpu.h>
#include <asm/mach-common/bits/trace.h>
#include <asm/deferred.h>
#include "cpu.h"
#define trace_buffer_save(x) \
@ -69,8 +71,16 @@ const struct memory_map const bfin_memory_map[] = {
}
};
void trap_c(struct pt_regs *regs)
#ifdef CONFIG_EXCEPTION_DEFER
unsigned int deferred_regs[deferred_regs_last];
#endif
/*
* Handle all exceptions while running in EVT3 or EVT5
*/
int trap_c(struct pt_regs *regs, uint32_t level)
{
uint32_t ret = 0;
uint32_t trapnr = (regs->seqstat & EXCAUSE);
bool data = false;
@ -87,7 +97,7 @@ void trap_c(struct pt_regs *regs)
*/
if (last_cplb_fault_retx != regs->retx) {
last_cplb_fault_retx = regs->retx;
return;
return ret;
}
}
@ -102,6 +112,12 @@ void trap_c(struct pt_regs *regs)
size_t i;
unsigned long tflags;
#ifdef CONFIG_EXCEPTION_DEFER
/* This should never happen */
if (level == 5)
bfin_panic(regs);
#endif
/*
* Keep the trace buffer so that a miss here points people
* to the right place (their code). Crashes here rarely
@ -167,11 +183,40 @@ void trap_c(struct pt_regs *regs)
trace_buffer_restore(tflags);
break;
}
#ifdef CONFIG_CMD_KGDB
/* Single step
* if we are in IRQ5, just ignore, otherwise defer, and handle it in kgdb
*/
case VEC_STEP:
if (level == 3) {
/* If we just returned from an interrupt, the single step
* event is for the RTI instruction.
*/
if (regs->retx == regs->pc)
break;
/* we just return if we are single stepping through IRQ5 */
if (regs->ipend & 0x20)
break;
/* Otherwise, turn single stepping off & fall through,
* which defers to IRQ5
*/
regs->syscfg &= ~1;
}
/* fall through */
#endif
default:
/* All traps come here */
#ifdef CONFIG_CMD_KGDB
if (level == 3) {
/* We need to handle this at EVT5, so try again */
ret = 1;
break;
}
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return 0;
#endif
bfin_panic(regs);
}
return ret;
}
#ifdef CONFIG_DEBUG_DUMP
@ -251,8 +296,10 @@ void dump(struct pt_regs *fp)
if (!ENABLE_DUMP)
return;
/* fp->ipend is garbage, so load it ourself */
#ifndef CONFIG_CMD_KGDB
/* fp->ipend is normally garbage, so load it ourself */
fp->ipend = bfin_read_IPEND();
#endif
hwerrcause = (fp->seqstat & HWERRCAUSE) >> HWERRCAUSE_P;
excause = (fp->seqstat & EXCAUSE) >> EXCAUSE_P;

15
cpu/mpc512x/cpu.c
View file

@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2010 DENX Software Engineering
* Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
* (C) Copyright 2007 DENX Software Engineering
*
* See file CREDITS for list of people who contributed to this
* project.
@ -32,6 +32,7 @@
#include <net.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
#if defined(CONFIG_OF_LIBFDT)
#include <fdt_support.h>
@ -44,7 +45,7 @@ int checkcpu (void)
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
ulong clock = gd->cpu_clk;
u32 pvr = get_pvr ();
u32 spridr = immr->sysconf.spridr;
u32 spridr = in_be32(&immr->sysconf.spridr);
char buf1[32], buf2[32];
puts ("CPU: ");
@ -87,17 +88,17 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
/*
* Enable Reset Control Reg - "RSTE" is the magic word that let us go
*/
immap->reset.rpr = 0x52535445;
out_be32(&immap->reset.rpr, 0x52535445);
/* Verify Reset Control Reg is enabled */
while (!((immap->reset.rcer) & RCER_CRE))
while (!(in_be32(&immap->reset.rcer) & RCER_CRE))
;
printf ("Resetting the board.\n");
udelay(200);
/* Perform reset */
immap->reset.rcr = RCR_SWHR;
out_be32(&immap->reset.rcr, RCR_SWHR);
/* Unreached... */
return 1;
@ -124,8 +125,8 @@ void watchdog_reset (void)
/* Reset watchdog */
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
immr->wdt.swsrr = 0x556c;
immr->wdt.swsrr = 0xaa39;
out_be32(&immr->wdt.swsrr, 0x556c);
out_be32(&immr->wdt.swsrr, 0xaa39);
if (re_enable)
enable_interrupts ();

8
cpu/mpc512x/diu.c
View file

@ -57,10 +57,10 @@ void diu_set_pixel_clock(unsigned int pixclock)
debug("DIU pixval = %lu\n", pixval);
/* Modify PXCLK in GUTS CLKDVDR */
debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr);
temp = *clkdvdr & 0xFFFFFF00;
*clkdvdr = temp | (pixval & 0xFF);
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr);
debug("DIU: Current value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr));
temp = in_be32(clkdvdr) & 0xFFFFFF00;
out_be32(clkdvdr, temp | (pixval & 0xFF));
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr));
}
char *valid_bmp(char *addr)

6
cpu/mpc512x/pci.c
View file

@ -1,6 +1,6 @@
/*
* Copyright (C) 2009-2010 DENX Software Engineering <wd@denx.de>
* Copyright (C) Freescale Semiconductor, Inc. 2006, 2007.
* Copyright (C) 2009 DENX Software Engineering <wd@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -60,10 +60,10 @@ pci_init_board(void)
struct pci_controller *hose;
/* Set PCI divider for 33MHz */
reg32 = im->clk.scfr[0];
reg32 = in_be32(&im->clk.scfr[0]);
reg32 &= ~(SCFR1_PCI_DIV_MASK);
reg32 |= SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT;
im->clk.scfr[0] = reg32;
out_be32(&im->clk.scfr[0], reg32);
clrsetbits_be32(&im->clk.scfr[0],
SCFR1_PCI_DIV_MASK,

8
cpu/mpc512x/serial.c
View file

@ -1,5 +1,5 @@
/*
* (C) Copyright 2000 - 2009
* (C) Copyright 2000 - 2010
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@ -125,7 +125,7 @@ void serial_putc (const char c)
while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
;
psc->tfdata_8 = c;
out_8(&psc->tfdata_8, c);
}
void serial_putc_raw (const char c)
@ -137,7 +137,7 @@ void serial_putc_raw (const char c)
while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
;
psc->tfdata_8 = c;
out_8(&psc->tfdata_8, c);
}
@ -157,7 +157,7 @@ int serial_getc (void)
while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
;
return psc->rfdata_8;
return in_8(&psc->rfdata_8);
}
int serial_tstc (void)

2
cpu/ppc4xx/44x_spd_ddr2.c
View file

@ -426,7 +426,7 @@ phys_size_t initdram(int board_type)
unsigned char spd0[MAX_SPD_BYTES];
unsigned char spd1[MAX_SPD_BYTES];
unsigned char *dimm_spd[MAXDIMMS];
unsigned long dimm_populated[MAXDIMMS];
unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE};
unsigned long num_dimm_banks; /* on board dimm banks */
unsigned long val;
ddr_cas_id_t selected_cas = DDR_CAS_5; /* preset to silence compiler */

2
cpu/ppc4xx/cpu.c
View file

@ -196,7 +196,7 @@ static char *bootstrap_str[] = {
"I2C (Addr 0x54)", /* A8 */
"I2C (Addr 0x52)", /* A4 */
};
static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
#endif
#if defined(CONFIG_460SX)

46
drivers/mtd/nand/mxc_nand.c
View file

@ -149,6 +149,43 @@ static struct nand_ecclayout nand_soft_eccoob = {
};
#endif
static struct nand_ecclayout nand_hw_eccoob_largepage = {
.eccbytes = 20,
.eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
.oobfree = {{2, 4}, {11, 10}, {27, 10}, {43, 10}, {59, 5}, }
};
#ifdef CONFIG_MX27
static int is_16bit_nand(void)
{
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
return 1;
else
return 0;
}
#elif defined(CONFIG_MX31)
static int is_16bit_nand(void)
{
struct clock_control_regs *sc_regs =
(struct clock_control_regs *)CCM_BASE;
if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B)
return 1;
else
return 0;
}
#else
#warning "8/16 bit NAND autodetection not supported"
static int is_16bit_nand(void)
{
return 0;
}
#endif
static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size)
{
uint32_t *d = dest;
@ -808,8 +845,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
int board_nand_init(struct nand_chip *this)
{
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
struct mtd_info *mtd;
uint16_t tmp;
int err = 0;
@ -871,10 +906,15 @@ int board_nand_init(struct nand_chip *this)
writew(0x4, &host->regs->nfc_wrprot);
/* NAND bus width determines access funtions used by upper layer */
if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
if (is_16bit_nand())
this->options |= NAND_BUSWIDTH_16;
#ifdef CONFIG_SYS_NAND_LARGEPAGE
host->pagesize_2k = 1;
this->ecc.layout = &nand_hw_eccoob_largepage;
#else
host->pagesize_2k = 0;
#endif
return err;
}

2
examples/standalone/smc91111_eeprom.c
View file

@ -29,8 +29,6 @@
#include <common.h>
#include <exports.h>
/* the smc91111.h gets base addr through eth_device' iobase */
struct eth_device { unsigned long iobase; };
#include "../drivers/net/smc91111.h"
#ifndef SMC91111_EEPROM_INIT

8
examples/standalone/smc911x_eeprom.c
View file

@ -16,13 +16,6 @@
#include <common.h>
#include <exports.h>
/* the smc911x.h gets base addr through eth_device' iobase */
struct eth_device {
const char *name;
unsigned long iobase;
void *priv;
};
#include "../drivers/net/smc911x.h"
/**
@ -324,7 +317,6 @@ int smc911x_eeprom(int argc, char *argv[])
{
/* Avoid initializing on stack as gcc likes to call memset() */
struct eth_device dev;
dev.name = __func__;
dev.iobase = CONFIG_SMC911X_BASE;
/* Print the ABI version */

39
include/asm-arm/arch-mx31/mx31-regs.h
View file

@ -24,6 +24,45 @@
#ifndef __ASM_ARCH_MX31_REGS_H
#define __ASM_ARCH_MX31_REGS_H
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
/* Clock control module registers */
struct clock_control_regs {
u32 ccmr;
u32 pdr0;
u32 pdr1;
u32 rcsr;
u32 mpctl;
u32 upctl;
u32 spctl;
u32 cosr;
u32 cgr0;
u32 cgr1;
u32 cgr2;
u32 wimr0;
u32 ldc;
u32 dcvr0;
u32 dcvr1;
u32 dcvr2;
u32 dcvr3;
u32 ltr0;
u32 ltr1;
u32 ltr2;
u32 ltr3;
u32 ltbr0;
u32 ltbr1;
u32 pmcr0;
u32 pmcr1;
u32 pdr2;
};
/* Bit definitions for RCSR register in CCM */
#define CCM_RCSR_NF16B (1 << 31)
#define CCM_RCSR_NFMS (1 << 30)
#endif
#define __REG(x) (*((volatile u32 *)(x)))
#define __REG16(x) (*((volatile u16 *)(x)))
#define __REG8(x) (*((volatile u8 *)(x)))

7
include/asm-blackfin/config.h
View file

@ -66,6 +66,11 @@
# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
#endif
/* If we are using KGDB, make sure we defer exceptions */
#ifdef CONFIG_CMD_KGDB
# define CONFIG_EXCEPTION_DEFER 1
#endif
/* Using L1 scratch pad makes sense for everyone by default. */
#ifndef CONFIG_LINUX_CMDLINE_ADDR
# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH
@ -138,6 +143,8 @@
#endif
#ifndef CONFIG_SYS_CBSIZE
# define CONFIG_SYS_CBSIZE 1024
#elif defined(CONFIG_CMD_KGDB) && CONFIG_SYS_CBSIZE < 1024
# error "kgdb needs cbsize to be >= 1024"
#endif
#ifndef CONFIG_SYS_BARGSIZE
# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

20
include/asm-blackfin/deferred.h Normal file
View file

@ -0,0 +1,20 @@
/*
* U-boot - deferred register layout
*
* Copyright 2004-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _BLACKFIN_DEFER_H
#define _BLACKFIN_DEFER_H
#define deferred_regs_DCPLB_FAULT_ADDR 0
#define deferred_regs_ICPLB_FAULT_ADDR 1
#define deferred_regs_retx 2
#define deferred_regs_SEQSTAT 3
#define deferred_regs_SYSCFG 4
#define deferred_regs_IMASK 5
#define deferred_regs_last 6
#endif /* _BLACKFIN_DEFER_H */

10
include/asm-blackfin/entry.h
View file

@ -86,6 +86,11 @@
[--sp] = RETE;
[--sp] = SEQSTAT;
[--sp] = SYSCFG;
#ifdef CONFIG_CMD_KGDB
p0.l = lo(IPEND)
p0.h = hi(IPEND)
r0 = [p0];
#endif
[--sp] = r0; /* Skip IPEND as well. */
.endm
@ -137,6 +142,11 @@
[--sp] = RETE;
[--sp] = SEQSTAT;
[--sp] = SYSCFG;
#ifdef CONFIG_CMD_KGDB
p0.l = lo(IPEND)
p0.h = hi(IPEND)
r0 = [p0];
#endif
[--sp] = r0; /* Skip IPEND as well. */
.endm

3
include/asm-blackfin/mach-common/bits/core.h
View file

@ -105,5 +105,8 @@
#define SSSTEP 0x00000001 /* Supervisor Single Step */
#define CCEN 0x00000002 /* Cycle Counter Enable */
#define SNEN 0x00000004 /* Self-Nesting Interrupt Enable */
#define SYSCFG_SSSTEP_P 0
#define SYSCFG_CCEN_P 1
#define SYSCFG_SCEN_P 2
#endif

1
include/asm-blackfin/signal.h Normal file
View file

@ -0,0 +1 @@
#include <asm-generic/signal.h>

101
include/asm-generic/signal.h Normal file
View file

@ -0,0 +1,101 @@
#ifndef __ASM_GENERIC_SIGNAL_H
#define __ASM_GENERIC_SIGNAL_H
#include <linux/types.h>
#define _NSIG 64
#define _NSIG_BPW BITS_PER_LONG
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPOLL SIGIO
/*
#define SIGLOST 29
*/
#define SIGPWR 30
#define SIGSYS 31
#define SIGUNUSED 31
/* These should not be considered constants from userland. */
#define SIGRTMIN 32
#ifndef SIGRTMAX
#define SIGRTMAX _NSIG
#endif
/*
* SA_FLAGS values:
*
* SA_ONSTACK indicates that a registered stack_t will be used.
* SA_RESTART flag to get restarting signals (which were the default long ago)
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
* SA_RESETHAND clears the handler when the signal is delivered.
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
* SA_NODEFER prevents the current signal from being masked in the handler.
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
*/
#define SA_NOCLDSTOP 0x00000001
#define SA_NOCLDWAIT 0x00000002
#define SA_SIGINFO 0x00000004
#define SA_ONSTACK 0x08000000
#define SA_RESTART 0x10000000
#define SA_NODEFER 0x40000000
#define SA_RESETHAND 0x80000000
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
/*
* New architectures should not define the obsolete
* SA_RESTORER 0x04000000
*/
/*
* sigaltstack controls
*/
#define SS_ONSTACK 1
#define SS_DISABLE 2
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
#ifndef __ASSEMBLY__
typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
/* not actually used, but required for linux/syscalls.h */
#endif /* __ASSEMBLY__ */
#endif /* _ASM_GENERIC_SIGNAL_H */

2
include/asm-m68k/config.h
View file

@ -21,4 +21,6 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#define CONFIG_LMB
#endif

16
include/asm-microblaze/unaligned.h Normal file
View file

@ -0,0 +1,16 @@
#ifndef _ASM_MICROBLAZE_UNALIGNED_H
#define _ASM_MICROBLAZE_UNALIGNED_H
#ifdef __KERNEL__
/*
* The Microblaze can do unaligned accesses itself in big endian mode.
*/
#include <linux/unaligned/access_ok.h>
#include <linux/unaligned/generic.h>
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
#endif /* __KERNEL__ */
#endif /* _ASM_MICROBLAZE_UNALIGNED_H */

26
include/asm-mips/unaligned.h Normal file
View file

@ -0,0 +1,26 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#ifndef _ASM_MIPS_UNALIGNED_H
#define _ASM_MIPS_UNALIGNED_H
#include <compiler.h>
#if defined(__MIPSEB__)
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
#elif defined(__MIPSEL__)
#define get_unaligned __get_unaligned_le
#define put_unaligned __put_unaligned_le
#else
#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/unaligned/generic.h>
#endif /* _ASM_MIPS_UNALIGNED_H */

2
include/asm-ppc/config.h
View file

@ -21,6 +21,8 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#define CONFIG_LMB
#ifndef CONFIG_MAX_MEM_MAPPED
#if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)

2
include/asm-sparc/config.h
View file

@ -21,4 +21,6 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#define CONFIG_LMB
#endif

1
include/configs/bfin_adi_common.h
View file

@ -83,6 +83,7 @@
# define CONFIG_CMD_CPLBINFO
# define CONFIG_CMD_ELF
# define CONFIG_ELF_SIMPLE_LOAD
# define CONFIG_CMD_KGDB
# define CONFIG_CMD_REGINFO
# define CONFIG_CMD_STRINGS
# if defined(__ADSPBF51x__) || defined(__ADSPBF52x__) || defined(__ADSPBF54x__)

25
include/configs/mx31pdk.h
View file

@ -30,6 +30,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/arch/mx31-regs.h>
/* High Level Configuration Options */
#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
#define CONFIG_MX31 1 /* in a mx31 */
@ -51,7 +53,7 @@
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
#define CONFIG_SYS_MALLOC_LEN (2*CONFIG_ENV_SIZE + 2 * 128 * 1024)
/* Bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE 128
@ -89,6 +91,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SPI
#define CONFIG_CMD_DATE
#define CONFIG_CMD_NAND
/*
* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
@ -104,7 +107,10 @@
"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
"bootcmd=run bootcmd_net\0" \
"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \
"tftpboot 0x81000000 uImage-mx31; bootm\0"
"tftpboot 0x81000000 uImage-mx31; bootm\0" \
"prg_uboot=tftpboot 0x81000000 u-boot-nand.bin; " \
"nand erase 0x0 0x40000; " \
"nand write 0x81000000 0x0 0x40000\0"
#define CONFIG_NET_MULTI
#define CONFIG_SMC911X 1
@ -156,9 +162,20 @@
/* No NOR flash present */
#define CONFIG_SYS_NO_FLASH 1
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_OFFSET 0x40000
#define CONFIG_ENV_OFFSET_REDUND 0x60000
#define CONFIG_ENV_SIZE (128 * 1024)
#define CONFIG_ENV_SIZE (128 * 1024)
/*
* NAND driver
*/
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE
/* NAND configuration for the NAND_SPL */

6
include/image.h
View file

@ -46,16 +46,16 @@
#include <lmb.h>
#include <asm/u-boot.h>
#include <command.h>
#endif /* USE_HOSTCC */
#include <command.h>
#if defined(CONFIG_FIT)
#include <fdt.h>
#include <libfdt.h>
#include <fdt_support.h>
#define CONFIG_MD5 /* FIT images need MD5 support */
#define CONFIG_SHA1 /* and SHA1 */
#endif
/*
@ -255,7 +255,7 @@ typedef struct bootm_headers {
#define BOOTM_STATE_OS_GO (0x00000080)
int state;
#ifndef USE_HOSTCC
#ifdef CONFIG_LMB
struct lmb lmb; /* for memory mgmt */
#endif
} bootm_headers_t;

4
include/lmb.h
View file

@ -52,6 +52,10 @@ lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
{
return type->region[region_nr].size;
}
void board_lmb_reserve(struct lmb *lmb);
void arch_lmb_reserve(struct lmb *lmb);
#endif /* __KERNEL__ */
#endif /* _LINUX_LMB_H */

2
lib_blackfin/Makefile
View file

@ -37,12 +37,14 @@ SOBJS-y += memcpy.o
SOBJS-y += memmove.o
SOBJS-y += memset.o
SOBJS-y += outs.o
SOBJS-$(CONFIG_CMD_KGDB) += __kgdb.o
COBJS-y += board.o
COBJS-y += boot.o
COBJS-y += cache.o
COBJS-y += clocks.o
COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
COBJS-y += muldi3.o
COBJS-$(CONFIG_POST) += post.o tests.o
COBJS-y += string.o

155
lib_blackfin/__kgdb.S Normal file
View file

@ -0,0 +1,155 @@
#include <asm/linkage.h>
/* save stack context for non-local goto
* int kgdb_setjmp(long *buf)
*/
ENTRY(_kgdb_setjmp)
[--SP] = p0; /* Save P0 */
p0 = r0;
r0 = [SP++]; /* Load P0 into R0 */
[p0 + 0x00] = r0; /* GP address registers */
[p0 + 0x04] = p1;
[p0 + 0x08] = p2;
[p0 + 0x0C] = p3;
[p0 + 0x10] = p4;
[p0 + 0x14] = p5;
[p0 + 0x18] = FP; /* frame pointer */
[p0 + 0x1C] = SP; /* stack pointer */
[p0 + 0x20] = p0; /* data regs */
[p0 + 0x24] = r1;
[p0 + 0x28] = r2;
[p0 + 0x2C] = r3;
[p0 + 0x30] = r4;
[p0 + 0x34] = r5;
[p0 + 0x38] = r6;
[p0 + 0x3C] = r7;
r0 = ASTAT; [p0 + 0x40] = r0;
/* loop counters */
r0 = LC0; [p0 + 0x44] = r0;
r0 = LC1; [p0 + 0x48] = r0;
/* Accumulator */
r0 = A0.w; [p0 + 0x4C] = r0;
r0.l = A0.x; [p0 + 0x50] = r0;
r0 = A1.w; [p0 + 0x54] = r0;
r0.l = A1.x; [p0 + 0x58] = r0;
/* index registers */
r0 = i0; [p0 + 0x5C] = r0;
r0 = i1; [p0 + 0x60] = r0;
r0 = i2; [p0 + 0x64] = r0;
r0 = i3; [p0 + 0x68] = r0;
/* modifier registers */
r0 = m0; [p0 + 0x6C] = r0;
r0 = m1; [p0 + 0x70] = r0;
r0 = m2; [p0 + 0x74] = r0;
r0 = m3; [p0 + 0x78] = r0;
/* length registers */
r0 = l0; [p0 + 0x7C] = r0;
r0 = l1; [p0 + 0x80] = r0;
r0 = l2; [p0 + 0x84] = r0;
r0 = l3; [p0 + 0x88] = r0;
/* base registers */
r0 = b0; [p0 + 0x8C] = r0;
r0 = b1; [p0 + 0x90] = r0;
r0 = b2; [p0 + 0x94] = r0;
r0 = b3; [p0 + 0x98] = r0;
/* store return address */
r0 = RETS; [p0 + 0x9C] = r0;
R0 = 0;
RTS;
ENDPROC(_kgdb_setjmp)
/*
* non-local jump to a saved stack context
* longjmp(long *buf, int val)
*/
ENTRY(_kgdb_longjmp)
p0 = r0;
r0 = [p0 + 0x00];
[--sp] = r0;
/* GP address registers - skip p0 for now*/
p1 = [p0 + 0x04];
p2 = [p0 + 0x08];
p3 = [p0 + 0x0C];
p4 = [p0 + 0x10];
p5 = [p0 + 0x14];
/* frame pointer */
fp = [p0 + 0x18];
/* stack pointer */
r0 = [sp++];
sp = [p0 + 0x1C];
[--sp] = r0;
[--sp] = r1;
/* data regs */
r0 = [p0 + 0x20];
r1 = [p0 + 0x24];
r2 = [p0 + 0x28];
r3 = [p0 + 0x2C];
r4 = [p0 + 0x30];
r5 = [p0 + 0x34];
r6 = [p0 + 0x38];
r7 = [p0 + 0x3C];
r0 = [p0 + 0x40]; ASTAT = r0;
/* loop counters */
r0 = [p0 + 0x44]; LC0 = r0;
r0 = [p0 + 0x48]; LC1 = r0;
/* Accumulator */
r0 = [p0 + 0x4C]; A0.w = r0;
r0 = [p0 + 0x50]; A0.x = r0;
r0 = [p0 + 0x54]; A1.w = r0;
r0 = [p0 + 0x58]; A1.x = r0;
/* index registers */
r0 = [p0 + 0x5C]; i0 = r0;
r0 = [p0 + 0x60]; i1 = r0;
r0 = [p0 + 0x64]; i2 = r0;
r0 = [p0 + 0x68]; i3 = r0;
/* modifier registers */
r0 = [p0 + 0x6C]; m0 = r0;
r0 = [p0 + 0x70]; m1 = r0;
r0 = [p0 + 0x74]; m2 = r0;
r0 = [p0 + 0x78]; m3 = r0;
/* length registers */
r0 = [p0 + 0x7C]; l0 = r0;
r0 = [p0 + 0x80]; l1 = r0;
r0 = [p0 + 0x84]; l2 = r0;
r0 = [p0 + 0x88]; l3 = r0;
/* base registers */
r0 = [p0 + 0x8C]; b0 = r0;
r0 = [p0 + 0x90]; b1 = r0;
r0 = [p0 + 0x94]; b2 = r0;
r0 = [p0 + 0x98]; b3 = r0;
/* store return address */
r0 = [p0 + 0x9C]; RETS = r0;
/* fixup R0 & P0 */
r0 = [sp++];
p0 = [sp++];
CC = R0 == 0;
IF !CC JUMP .Lfinished;
R0 = 1;
.Lfinished:
RTS;
ENDPROC(_kgdb_longjmp)

6
lib_blackfin/board.c
View file

@ -22,6 +22,7 @@
#include <asm/cplb.h>
#include <asm/mach-common/bits/mpu.h>
#include <kgdb.h>
#ifdef CONFIG_CMD_NAND
#include <nand.h> /* cannot even include nand.h if it isnt configured */
@ -356,6 +357,11 @@ void board_init_r(gd_t * id, ulong dest_addr)
/* Initialize the console (after the relocation and devices init) */
console_init_r();
#ifdef CONFIG_CMD_KGDB
puts("KGDB: ");
kgdb_init();
#endif
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
status_led_set(STATUS_LED_CRASH, STATUS_LED_OFF);

423
lib_blackfin/kgdb.c Normal file
View file

@ -0,0 +1,423 @@
/*
* U-boot - architecture specific kgdb code
*
* Copyright 2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <kgdb.h>
#include <asm/processor.h>
#include <asm/mach-common/bits/core.h>
#include "kgdb.h"
#include <asm/deferred.h>
#include <asm/traps.h>
#include <asm/signal.h>
void kgdb_enter(struct pt_regs *regs, kgdb_data *kdp)
{
/* disable interrupts */
disable_interrupts();
/* reply to host that an exception has occurred */
kdp->sigval = kgdb_trap(regs);
/* send the PC and the Stack Pointer */
kdp->nregs = 2;
kdp->regs[0].num = BFIN_PC;
kdp->regs[0].val = regs->pc;
kdp->regs[1].num = BFIN_SP;
kdp->regs[1].val = (unsigned long)regs;
}
void kgdb_exit(struct pt_regs *regs, kgdb_data *kdp)
{
if (kdp->extype & KGDBEXIT_WITHADDR)
printf("KGDBEXIT_WITHADDR\n");
switch (kdp->extype & KGDBEXIT_TYPEMASK) {
case KGDBEXIT_KILL:
printf("KGDBEXIT_KILL:\n");
break;
case KGDBEXIT_CONTINUE:
/* Make sure the supervisor single step bit is clear */
regs->syscfg &= ~1;
break;
case KGDBEXIT_SINGLE:
/* set the supervisor single step bit */
regs->syscfg |= 1;
break;
default:
printf("KGDBEXIT : %d\n", kdp->extype);
}
/* enable interrupts */
enable_interrupts();
}
int kgdb_trap(struct pt_regs *regs)
{
/* ipend doesn't get filled in properly */
switch (regs->seqstat & EXCAUSE) {
case VEC_EXCPT01:
return SIGTRAP;
case VEC_EXCPT03:
return SIGSEGV;
case VEC_EXCPT02:
return SIGTRAP;
case VEC_EXCPT04 ... VEC_EXCPT15:
return SIGILL;
case VEC_STEP:
return SIGTRAP;
case VEC_OVFLOW:
return SIGTRAP;
case VEC_UNDEF_I:
return SIGILL;
case VEC_ILGAL_I:
return SIGILL;
case VEC_CPLB_VL:
return SIGSEGV;
case VEC_MISALI_D:
return SIGBUS;
case VEC_UNCOV:
return SIGILL;
case VEC_CPLB_MHIT:
return SIGSEGV;
case VEC_MISALI_I:
return SIGBUS;
case VEC_CPLB_I_VL:
return SIGBUS;
case VEC_CPLB_I_MHIT:
return SIGSEGV;
default:
return SIGBUS;
}
}
/*
* getregs - gets the pt_regs, and gives them to kgdb's buffer
*/
int kgdb_getregs(struct pt_regs *regs, char *buf, int max)
{
unsigned long *gdb_regs = (unsigned long *)buf;
if (max < NUMREGBYTES)
kgdb_error(KGDBERR_NOSPACE);
if ((unsigned long)gdb_regs & 3)
kgdb_error(KGDBERR_ALIGNFAULT);
gdb_regs[BFIN_R0] = regs->r0;
gdb_regs[BFIN_R1] = regs->r1;
gdb_regs[BFIN_R2] = regs->r2;
gdb_regs[BFIN_R3] = regs->r3;
gdb_regs[BFIN_R4] = regs->r4;
gdb_regs[BFIN_R5] = regs->r5;
gdb_regs[BFIN_R6] = regs->r6;
gdb_regs[BFIN_R7] = regs->r7;
gdb_regs[BFIN_P0] = regs->p0;
gdb_regs[BFIN_P1] = regs->p1;
gdb_regs[BFIN_P2] = regs->p2;
gdb_regs[BFIN_P3] = regs->p3;
gdb_regs[BFIN_P4] = regs->p4;
gdb_regs[BFIN_P5] = regs->p5;
gdb_regs[BFIN_SP] = (unsigned long)regs;
gdb_regs[BFIN_FP] = regs->fp;
gdb_regs[BFIN_I0] = regs->i0;
gdb_regs[BFIN_I1] = regs->i1;
gdb_regs[BFIN_I2] = regs->i2;
gdb_regs[BFIN_I3] = regs->i3;
gdb_regs[BFIN_M0] = regs->m0;
gdb_regs[BFIN_M1] = regs->m1;
gdb_regs[BFIN_M2] = regs->m2;
gdb_regs[BFIN_M3] = regs->m3;
gdb_regs[BFIN_B0] = regs->b0;
gdb_regs[BFIN_B1] = regs->b1;
gdb_regs[BFIN_B2] = regs->b2;
gdb_regs[BFIN_B3] = regs->b3;
gdb_regs[BFIN_L0] = regs->l0;
gdb_regs[BFIN_L1] = regs->l1;
gdb_regs[BFIN_L2] = regs->l2;
gdb_regs[BFIN_L3] = regs->l3;
gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
gdb_regs[BFIN_ASTAT] = regs->astat;
gdb_regs[BFIN_RETS] = regs->rets;
gdb_regs[BFIN_LC0] = regs->lc0;
gdb_regs[BFIN_LT0] = regs->lt0;
gdb_regs[BFIN_LB0] = regs->lb0;
gdb_regs[BFIN_LC1] = regs->lc1;
gdb_regs[BFIN_LT1] = regs->lt1;
gdb_regs[BFIN_LB1] = regs->lb1;
gdb_regs[BFIN_CYCLES] = 0;
gdb_regs[BFIN_CYCLES2] = 0;
gdb_regs[BFIN_USP] = regs->usp;
gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
gdb_regs[BFIN_SYSCFG] = regs->syscfg;
gdb_regs[BFIN_RETI] = regs->pc;
gdb_regs[BFIN_RETX] = regs->retx;
gdb_regs[BFIN_RETN] = regs->retn;
gdb_regs[BFIN_RETE] = regs->rete;
gdb_regs[BFIN_PC] = regs->pc;
gdb_regs[BFIN_CC] = 0;
gdb_regs[BFIN_EXTRA1] = 0;
gdb_regs[BFIN_EXTRA2] = 0;
gdb_regs[BFIN_EXTRA3] = 0;
gdb_regs[BFIN_IPEND] = regs->ipend;
return NUMREGBYTES;
}
/*
* putreg - put kgdb's reg (regno) into the pt_regs
*/
void kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length)
{
unsigned long *ptr = (unsigned long *)buf;
if (regno < 0 || regno > BFIN_NUM_REGS)
kgdb_error(KGDBERR_BADPARAMS);
if (length < 4)
kgdb_error(KGDBERR_NOSPACE);
if ((unsigned long)ptr & 3)
kgdb_error(KGDBERR_ALIGNFAULT);
switch (regno) {
case BFIN_R0:
regs->r0 = *ptr;
break;
case BFIN_R1:
regs->r1 = *ptr;
break;
case BFIN_R2:
regs->r2 = *ptr;
break;
case BFIN_R3:
regs->r3 = *ptr;
break;
case BFIN_R4:
regs->r4 = *ptr;
break;
case BFIN_R5:
regs->r5 = *ptr;
break;
case BFIN_R6:
regs->r6 = *ptr;
break;
case BFIN_R7:
regs->r7 = *ptr;
break;
case BFIN_P0:
regs->p0 = *ptr;
break;
case BFIN_P1:
regs->p1 = *ptr;
break;
case BFIN_P2:
regs->p2 = *ptr;
break;
case BFIN_P3:
regs->p3 = *ptr;
break;
case BFIN_P4:
regs->p4 = *ptr;
break;
case BFIN_P5:
regs->p5 = *ptr;
break;
case BFIN_SP:
regs->reserved = *ptr;
break;
case BFIN_FP:
regs->fp = *ptr;
break;
case BFIN_I0:
regs->i0 = *ptr;
break;
case BFIN_I1:
regs->i1 = *ptr;
break;
case BFIN_I2:
regs->i2 = *ptr;
break;
case BFIN_I3:
regs->i3 = *ptr;
break;
case BFIN_M0:
regs->m0 = *ptr;
break;
case BFIN_M1:
regs->m1 = *ptr;
break;
case BFIN_M2:
regs->m2 = *ptr;
break;
case BFIN_M3:
regs->m3 = *ptr;
break;
case BFIN_B0:
regs->b0 = *ptr;
break;
case BFIN_B1:
regs->b1 = *ptr;
break;
case BFIN_B2:
regs->b2 = *ptr;
break;
case BFIN_B3:
regs->b3 = *ptr;
break;
case BFIN_L0:
regs->l0 = *ptr;
break;
case BFIN_L1:
regs->l1 = *ptr;
break;
case BFIN_L2:
regs->l2 = *ptr;
break;
case BFIN_L3:
regs->l3 = *ptr;
break;
case BFIN_A0_DOT_X:
regs->a0x = *ptr;
break;
case BFIN_A0_DOT_W:
regs->a0w = *ptr;
break;
case BFIN_A1_DOT_X:
regs->a1x = *ptr;
break;
case BFIN_A1_DOT_W:
regs->a1w = *ptr;
break;
case BFIN_ASTAT:
regs->astat = *ptr;
break;
case BFIN_RETS:
regs->rets = *ptr;
break;
case BFIN_LC0:
regs->lc0 = *ptr;
break;
case BFIN_LT0:
regs->lt0 = *ptr;
break;
case BFIN_LB0:
regs->lb0 = *ptr;
break;
case BFIN_LC1:
regs->lc1 = *ptr;
break;
case BFIN_LT1:
regs->lt1 = *ptr;
break;
case BFIN_LB1:
regs->lb1 = *ptr;
break;
/*
BFIN_CYCLES,
BFIN_CYCLES2,
BFIN_USP,
BFIN_SEQSTAT,
BFIN_SYSCFG,
*/
case BFIN_RETX:
regs->retx = *ptr;
break;
case BFIN_RETN:
regs->retn = *ptr;
break;
case BFIN_RETE:
regs->rete = *ptr;
break;
case BFIN_PC:
regs->pc = *ptr;
break;
default:
kgdb_error(KGDBERR_BADPARAMS);
}
}
void kgdb_putregs(struct pt_regs *regs, char *buf, int length)
{
unsigned long *gdb_regs = (unsigned long *)buf;
if (length != BFIN_NUM_REGS)
kgdb_error(KGDBERR_NOSPACE);
if ((unsigned long)gdb_regs & 3)
kgdb_error(KGDBERR_ALIGNFAULT);
regs->r0 = gdb_regs[BFIN_R0];
regs->r1 = gdb_regs[BFIN_R1];
regs->r2 = gdb_regs[BFIN_R2];
regs->r3 = gdb_regs[BFIN_R3];
regs->r4 = gdb_regs[BFIN_R4];
regs->r5 = gdb_regs[BFIN_R5];
regs->r6 = gdb_regs[BFIN_R6];
regs->r7 = gdb_regs[BFIN_R7];
regs->p0 = gdb_regs[BFIN_P0];
regs->p1 = gdb_regs[BFIN_P1];
regs->p2 = gdb_regs[BFIN_P2];
regs->p3 = gdb_regs[BFIN_P3];
regs->p4 = gdb_regs[BFIN_P4];
regs->p5 = gdb_regs[BFIN_P5];
regs->fp = gdb_regs[BFIN_FP];
/* regs->sp = gdb_regs[BFIN_ ]; */
regs->i0 = gdb_regs[BFIN_I0];
regs->i1 = gdb_regs[BFIN_I1];
regs->i2 = gdb_regs[BFIN_I2];
regs->i3 = gdb_regs[BFIN_I3];
regs->m0 = gdb_regs[BFIN_M0];
regs->m1 = gdb_regs[BFIN_M1];
regs->m2 = gdb_regs[BFIN_M2];
regs->m3 = gdb_regs[BFIN_M3];
regs->b0 = gdb_regs[BFIN_B0];
regs->b1 = gdb_regs[BFIN_B1];
regs->b2 = gdb_regs[BFIN_B2];
regs->b3 = gdb_regs[BFIN_B3];
regs->l0 = gdb_regs[BFIN_L0];
regs->l1 = gdb_regs[BFIN_L1];
regs->l2 = gdb_regs[BFIN_L2];
regs->l3 = gdb_regs[BFIN_L3];
regs->a0x = gdb_regs[BFIN_A0_DOT_X];
regs->a0w = gdb_regs[BFIN_A0_DOT_W];
regs->a1x = gdb_regs[BFIN_A1_DOT_X];
regs->a1w = gdb_regs[BFIN_A1_DOT_W];
regs->rets = gdb_regs[BFIN_RETS];
regs->lc0 = gdb_regs[BFIN_LC0];
regs->lt0 = gdb_regs[BFIN_LT0];
regs->lb0 = gdb_regs[BFIN_LB0];
regs->lc1 = gdb_regs[BFIN_LC1];
regs->lt1 = gdb_regs[BFIN_LT1];
regs->lb1 = gdb_regs[BFIN_LB1];
regs->usp = gdb_regs[BFIN_USP];
regs->syscfg = gdb_regs[BFIN_SYSCFG];
regs->retx = gdb_regs[BFIN_PC];
regs->retn = gdb_regs[BFIN_RETN];
regs->rete = gdb_regs[BFIN_RETE];
regs->pc = gdb_regs[BFIN_PC];
#if 0 /* can't change these */
regs->astat = gdb_regs[BFIN_ASTAT];
regs->seqstat = gdb_regs[BFIN_SEQSTAT];
regs->ipend = gdb_regs[BFIN_IPEND];
#endif
}
void kgdb_breakpoint(int argc, char *argv[])
{
asm volatile ("excpt 0x1\n");
}

160
lib_blackfin/kgdb.h Normal file
View file

@ -0,0 +1,160 @@
/* Blackfin KGDB header
*
* Copyright 2005-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef __ASM_BLACKFIN_KGDB_H__
#define __ASM_BLACKFIN_KGDB_H__
/* gdb locks */
#define KGDB_MAX_NO_CPUS 8
/*
* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
* At least NUMREGBYTES*2 are needed for register packets.
* Longer buffer is needed to list all threads.
*/
#define BUFMAX 2048
enum regnames {
/* Core Registers */
BFIN_R0 = 0,
BFIN_R1,
BFIN_R2,
BFIN_R3,
BFIN_R4,
BFIN_R5,
BFIN_R6,
BFIN_R7,
BFIN_P0,
BFIN_P1,
BFIN_P2,
BFIN_P3,
BFIN_P4,
BFIN_P5,
BFIN_SP,
BFIN_FP,
BFIN_I0,
BFIN_I1,
BFIN_I2,
BFIN_I3,
BFIN_M0,
BFIN_M1,
BFIN_M2,
BFIN_M3,
BFIN_B0,
BFIN_B1,
BFIN_B2,
BFIN_B3,
BFIN_L0,
BFIN_L1,
BFIN_L2,
BFIN_L3,
BFIN_A0_DOT_X,
BFIN_A0_DOT_W,
BFIN_A1_DOT_X,
BFIN_A1_DOT_W,
BFIN_ASTAT,
BFIN_RETS,
BFIN_LC0,
BFIN_LT0,
BFIN_LB0,
BFIN_LC1,
BFIN_LT1,
BFIN_LB1,
BFIN_CYCLES,
BFIN_CYCLES2,
BFIN_USP,
BFIN_SEQSTAT,
BFIN_SYSCFG,
BFIN_RETI,
BFIN_RETX,
BFIN_RETN,
BFIN_RETE,
/* Pseudo Registers */
BFIN_PC,
BFIN_CC,
BFIN_EXTRA1, /* Address of .text section. */
BFIN_EXTRA2, /* Address of .data section. */
BFIN_EXTRA3, /* Address of .bss section. */
BFIN_FDPIC_EXEC,
BFIN_FDPIC_INTERP,
/* MMRs */
BFIN_IPEND,
/* LAST ENTRY SHOULD NOT BE CHANGED. */
BFIN_NUM_REGS /* The number of all registers. */
};
/* Number of bytes of registers. */
#define NUMREGBYTES (BFIN_NUM_REGS * 4)
static inline void arch_kgdb_breakpoint(void)
{
asm volatile ("EXCPT 2;");
}
#define BREAK_INSTR_SIZE 2
#define CACHE_FLUSH_IS_SAFE 1
#define GDB_ADJUSTS_BREAK_OFFSET
#define GDB_SKIP_HW_WATCH_TEST
#define HW_INST_WATCHPOINT_NUM 6
#define HW_WATCHPOINT_NUM 8
#define TYPE_INST_WATCHPOINT 0
#define TYPE_DATA_WATCHPOINT 1
/* Instruction watchpoint address control register bits mask */
#define WPPWR 0x1
#define WPIREN01 0x2
#define WPIRINV01 0x4
#define WPIAEN0 0x8
#define WPIAEN1 0x10
#define WPICNTEN0 0x20
#define WPICNTEN1 0x40
#define EMUSW0 0x80
#define EMUSW1 0x100
#define WPIREN23 0x200
#define WPIRINV23 0x400
#define WPIAEN2 0x800
#define WPIAEN3 0x1000
#define WPICNTEN2 0x2000
#define WPICNTEN3 0x4000
#define EMUSW2 0x8000
#define EMUSW3 0x10000
#define WPIREN45 0x20000
#define WPIRINV45 0x40000
#define WPIAEN4 0x80000
#define WPIAEN5 0x100000
#define WPICNTEN4 0x200000
#define WPICNTEN5 0x400000
#define EMUSW4 0x800000
#define EMUSW5 0x1000000
#define WPAND 0x2000000
/* Data watchpoint address control register bits mask */
#define WPDREN01 0x1
#define WPDRINV01 0x2
#define WPDAEN0 0x4
#define WPDAEN1 0x8
#define WPDCNTEN0 0x10
#define WPDCNTEN1 0x20
#define WPDSRC0 0xc0
#define WPDACC0_OFFSET 8
#define WPDSRC1 0xc00
#define WPDACC1_OFFSET 12
/* Watchpoint status register bits mask */
#define STATIA0 0x1
#define STATIA1 0x2
#define STATIA2 0x4
#define STATIA3 0x8
#define STATIA4 0x10
#define STATIA5 0x20
#define STATDA0 0x40
#define STATDA1 0x80
#endif

44
lib_blackfin/string.c
View file

@ -230,15 +230,45 @@ void *memcpy(void *dst, const void *src, size_t count)
if (!count)
return dst;
if (addr_bfin_on_chip_mem(dst)) {
/* L1 is the destination */
return dma_memcpy(dst, src, count);
#ifdef CONFIG_CMD_KGDB
if (src >= (void *)SYSMMR_BASE) {
if (count == 2 && (unsigned long)src % 2 == 0) {
u16 mmr = bfin_read16(src);
memcpy(dst, &mmr, sizeof(mmr));
return dst;
}
if (count == 4 && (unsigned long)src % 4 == 0) {
u32 mmr = bfin_read32(src);
memcpy(dst, &mmr, sizeof(mmr));
return dst;
}
/* Failed for some reason */
memset(dst, 0xad, count);
return dst;
}
if (dst >= (void *)SYSMMR_BASE) {
if (count == 2 && (unsigned long)dst % 2 == 0) {
u16 mmr;
memcpy(&mmr, src, sizeof(mmr));
bfin_write16(dst, mmr);
return dst;
}
if (count == 4 && (unsigned long)dst % 4 == 0) {
u32 mmr;
memcpy(&mmr, src, sizeof(mmr));
bfin_write32(dst, mmr);
return dst;
}
/* Failed for some reason */
memset(dst, 0xad, count);
return dst;
}
#endif
} else if (addr_bfin_on_chip_mem(src)) {
/* L1 is the source */
/* if L1 is the source or dst, use DMA */
if (addr_bfin_on_chip_mem(dst) || addr_bfin_on_chip_mem(src))
return dma_memcpy(dst, src, count);
} else
else
/* No L1 is involved, so just call regular memcpy */
return memcpy_ASM(dst, src, count);
}

4
lib_generic/Makefile
View file

@ -38,11 +38,11 @@ COBJS-y += ctype.o
COBJS-y += display_options.o
COBJS-y += div64.o
COBJS-y += gunzip.o
COBJS-y += lmb.o
COBJS-$(CONFIG_LMB) += lmb.o
COBJS-y += ldiv.o
COBJS-$(CONFIG_MD5) += md5.o
COBJS-y += net_utils.o
COBJS-y += sha1.o
COBJS-$(CONFIG_SHA1) += sha1.o
COBJS-$(CONFIG_SHA256) += sha256.o
COBJS-y += string.o
COBJS-y += strmhz.o

12
lib_generic/lmb.c
View file

@ -334,3 +334,15 @@ int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)
}
return 0;
}
void __board_lmb_reserve(struct lmb *lmb)
{
/* please define platform specific board_lmb_reserve() */
}
void board_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__board_lmb_reserve")));
void __arch_lmb_reserve(struct lmb *lmb)
{
/* please define platform specific arch_lmb_reserve() */
}
void arch_lmb_reserve(struct lmb *lmb) __attribute__((weak, alias("__arch_lmb_reserve")));

1
lib_microblaze/board.c
View file

@ -43,7 +43,6 @@ extern int interrupts_init (void);
#endif
#if defined(CONFIG_CMD_NET)
extern int eth_init (bd_t * bis);
extern int getenv_IPaddr (char *);
#endif
/*

9
tools/Makefile
View file

@ -38,6 +38,15 @@ endif
#
include $(TOPDIR)/config.mk
# Enable all the config-independent tools
ifneq ($(HOST_TOOLS_ALL),)
CONFIG_LCD_LOGO = y
CONFIG_CMD_NET = y
CONFIG_INCA_IP = y
CONFIG_NETCONSOLE = y
CONFIG_SHA1_CHECK_UB_IMG = y
endif
# Generated executable files
BIN_FILES-$(CONFIG_LCD_LOGO) += bmp_logo$(SFX)
BIN_FILES-$(CONFIG_VIDEO_LOGO) += bmp_logo$(SFX)

8
tools/ubsha1.c
View file

@ -31,14 +31,6 @@
#include <sys/stat.h>
#include "sha1.h"
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
#endif
#include <config.h>
#undef __ASSEMBLY__
extern void sha1_csum (unsigned char *input, int ilen, unsigned char output[20]);
int main (int argc, char **argv)
{
unsigned char output[20];