ARM: sunxi: Fix reset command on sun6i/sun8i

The watchdog on sun6i/sun8i has a different layout.

Add the new layout and fix up the setup functions so that reset works.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
[ ijc -- removed sun5i workaround from sun6i/sun8i codepath as discussed ]
This commit is contained in:
Chen-Yu Tsai 2014-10-04 20:37:28 +08:00 committed by Hans de Goede
parent 4cdefba86d
commit 78c396a113
2 changed files with 30 additions and 0 deletions

View file

@ -75,6 +75,7 @@ int gpio_init(void)
void reset_cpu(ulong addr)
{
#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
static const struct sunxi_wdog *wdog =
&((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
@ -86,6 +87,15 @@ void reset_cpu(ulong addr)
/* sun5i sometimes gets stuck without this */
writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
}
#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
static const struct sunxi_wdog *wdog =
((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
/* Set the watchdog for its shortest interval (.5s) and wait */
writel(WDT_CFG_RESET, &wdog->cfg);
writel(WDT_MODE_EN, &wdog->mode);
writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
#endif
}
/* do some early init */

View file

@ -12,6 +12,9 @@
#define WDT_CTRL_RESTART (0x1 << 0)
#define WDT_CTRL_KEY (0x0a57 << 1)
#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
#define WDT_MODE_EN (0x1 << 0)
#define WDT_MODE_RESET_EN (0x1 << 1)
@ -21,4 +24,21 @@ struct sunxi_wdog {
u32 res[2];
};
#else
#define WDT_CFG_RESET (0x1)
#define WDT_MODE_EN (0x1)
struct sunxi_wdog {
u32 irq_en; /* 0x00 */
u32 irq_sta; /* 0x04 */
u32 res1[2];
u32 ctl; /* 0x10 */
u32 cfg; /* 0x14 */
u32 mode; /* 0x18 */
u32 res2;
};
#endif
#endif /* _SUNXI_WATCHDOG_H_ */