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mips: bmips: add bcm6345-rst driver support for BCM6328
This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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2 changed files with 31 additions and 0 deletions
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@ -6,6 +6,7 @@
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#include <dt-bindings/clock/bcm6328-clock.h>
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#include <dt-bindings/clock/bcm6328-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/reset/bcm6328-reset.h>
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#include "skeleton.dtsi"
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#include "skeleton.dtsi"
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/ {
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/ {
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@ -58,6 +59,12 @@
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#size-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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pll_cntl: syscon@10000068 {
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pll_cntl: syscon@10000068 {
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compatible = "syscon";
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compatible = "syscon";
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reg = <0x10000068 0x4>;
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reg = <0x10000068 0x4>;
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24
include/dt-bindings/reset/bcm6328-reset.h
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24
include/dt-bindings/reset/bcm6328-reset.h
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@ -0,0 +1,24 @@
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DT_BINDINGS_RESET_BCM6328_H
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#define __DT_BINDINGS_RESET_BCM6328_H
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#define BCM6328_RST_SPI 0
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#define BCM6328_RST_EPHY 1
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#define BCM6328_RST_SAR 2
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#define BCM6328_RST_ENETSW 3
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#define BCM6328_RST_USBS 4
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#define BCM6328_RST_USBH 5
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#define BCM6328_RST_PCM 6
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#define BCM6328_RST_PCIE_CORE 7
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#define BCM6328_RST_PCIE 8
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#define BCM6328_RST_PCIE_EXT 9
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#define BCM6328_RST_PCIE_HARD 10
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#endif /* __DT_BINDINGS_RESET_BCM6328_H */
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