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riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config

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At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The
intention was to use gdb to load device tree before running U-Boot
SPL/proper from RAM. When we switch to OF_SEPARATE we will have to
use our own DT but without "u-boot,dm-spl" in several essential
nodes, SPL does not boot.

Let's add all the required "u-boot,dm-spl" for SPL config.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This commit is contained in:
Bin Meng 2021-06-04 13:51:13 +08:00 committed by Leo Yu-Chi Liang
parent 048aff6d26
commit 77eae0ebe6
3 changed files with 54 additions and 0 deletions
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52
arch/riscv/dts/ae350-u-boot.dtsi Normal file
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@ -0,0 +1,52 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/ {
cpus {
u-boot,dm-spl;
CPU0: cpu@0 {
u-boot,dm-spl;
CPU0_intc: interrupt-controller {
u-boot,dm-spl;
};
};
CPU1: cpu@1 {
u-boot,dm-spl;
CPU1_intc: interrupt-controller {
u-boot,dm-spl;
};
};
CPU2: cpu@2 {
u-boot,dm-spl;
CPU2_intc: interrupt-controller {
u-boot,dm-spl;
};
};
CPU3: cpu@3 {
u-boot,dm-spl;
CPU3_intc: interrupt-controller {
u-boot,dm-spl;
};
};
};
memory@0 {
u-boot,dm-spl;
};
soc {
u-boot,dm-spl;
plic1: interrupt-controller@e6400000 {
u-boot,dm-spl;
};
plmt0@e6000000 {
u-boot,dm-spl;
};
};
serial0: serial@f0300000 {
u-boot,dm-spl;
};
};

1
arch/riscv/dts/ae350_32.dts
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@ -3,6 +3,7 @@
/dts-v1/;
#include "binman.dtsi"
#include "ae350-u-boot.dtsi"
/ {
#address-cells = <1>;

1
arch/riscv/dts/ae350_64.dts
View file

@ -3,6 +3,7 @@
/dts-v1/;
#include "binman.dtsi"
#include "ae350-u-boot.dtsi"
/ {
#address-cells = <2>;