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https://github.com/AsahiLinux/u-boot
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ARM: remove duplicated code for LaCie boards
This patch groups together all the common functions for LaCie boards: Ethernet PHY and MAC address initializations. Moreover the configurations for LaCie Kirkwood boards are merged into a single file: include/configs/lacie_kw.h Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
This commit is contained in:
Simon Guinot
Albert ARIBAUD
parent
5628fb75d1
commit
77ea071fef
14 changed files with 168 additions and 408 deletions
87
board/LaCie/common/common.c
Normal file
87
board/LaCie/common/common.c
Normal file
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@ -0,0 +1,87 @@
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/*
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* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <miiphy.h>
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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#define MV88E1116_LED_FCTRL_REG 10
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#define MV88E1116_CPRSP_CR3_REG 21
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#define MV88E1116_MAC_CTRL_REG 21
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#define MV88E1116_PGADR_REG 22
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#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
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#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
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void mv_phy_88e1116_init(const char *name)
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{
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u16 reg;
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u16 devadr;
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if (miiphy_set_current_dev(name))
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return;
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/* command to read PHY dev address */
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if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
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printf("Err..(%s) could not read PHY dev address\n", __func__);
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return;
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}
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/*
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* Enable RGMII delay on Tx and Rx for CPU port
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* Ref: sec 4.7.2 of chip datasheet
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*/
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
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miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
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reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
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miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
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/* reset the phy */
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miiphy_reset(name, devadr);
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printf("88E1116 Initialized on %s\n", name);
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}
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#endif /* CONFIG_CMD_NET && CONFIG_RESET_PHY_R */
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
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int lacie_read_mac_address(uchar *mac_addr)
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{
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int ret;
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ushort version;
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/* I2C-0 for on-board EEPROM */
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i2c_set_bus_num(0);
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/* Check layout version for EEPROM data */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uchar *) &version, 2);
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if (ret != 0) {
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
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}
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version = be16_to_cpu(version);
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if (version < 1 || version > 3) {
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printf("Error: unknown version %d for EEPROM data\n",
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version);
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return -1;
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}
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/* Read Ethernet MAC address from EEPROM */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac_addr, 6);
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if (ret != 0)
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
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}
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#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */
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20
board/LaCie/common/common.h
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20
board/LaCie/common/common.h
Normal file
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@ -0,0 +1,20 @@
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/*
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* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#ifndef _LACIE_COMMON_H
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#define _LACIE_COMMON_H
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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void mv_phy_88e1116_init(const char *name);
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#endif
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
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int lacie_read_mac_address(uchar *mac);
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#endif
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#endif /* _LACIE_COMMON_H */
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@ -26,10 +26,13 @@
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).o
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COBJS := edminiv2.o
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COBJS := edminiv2.o ../common/common.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -27,7 +27,6 @@
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#include <common.h>
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#include <miiphy.h>
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#include <asm/arch/orion5x.h>
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#include "edminiv2.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -96,33 +95,6 @@ int board_init(void)
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/* Configure and enable MV88E1116 PHY */
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void reset_phy(void)
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{
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u16 reg;
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u16 devadr;
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char *name = "egiga0";
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if (miiphy_set_current_dev(name))
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return;
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/* command to read PHY dev address */
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if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
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printf("Err..%s could not read PHY dev address\n",
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__func__);
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return;
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}
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/*
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* Enable RGMII delay on Tx and Rx for CPU port
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* Ref: sec 4.7.2 of chip datasheet
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*/
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
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miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
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reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
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miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
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/* reset the phy */
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miiphy_reset(name, devadr);
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printf("88E1116 Initialized on %s\n", name);
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mv_phy_88e1116_init("egiga0");
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}
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#endif /* CONFIG_RESET_PHY_R */
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@ -1,41 +0,0 @@
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/*
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* (C) Copyright 2009
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* Net Insight <www.netinsight.net>
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* Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
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*
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* Based on sheevaplug.h:
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef __EDMINIV2_BASE_H
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#define __EDMINIV2_BASE_H
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/* PHY related */
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#define MV88E1116_LED_FCTRL_REG 10
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#define MV88E1116_CPRSP_CR3_REG 21
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#define MV88E1116_MAC_CTRL_REG 21
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#define MV88E1116_PGADR_REG 22
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#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
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#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
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#endif /* __EDMINIV2_BASE_H */
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@ -21,10 +21,13 @@
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).o
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COBJS := net2big_v2.o
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COBJS := $(BOARD).o ../common/common.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -21,15 +21,14 @@
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <command.h>
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#include <i2c.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/kirkwood.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/gpio.h>
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#include "net2big_v2.h"
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#include "../common/common.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -92,91 +91,29 @@ int board_init(void)
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return 0;
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}
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#if defined(CONFIG_MISC_INIT_R)
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int misc_init_r(void)
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{
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#ifdef CONFIG_CMD_I2C
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
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if (!getenv("ethaddr")) {
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ushort version;
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uchar mac[6];
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int ret;
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/* I2C-0 for on-board EEPROM */
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i2c_set_bus_num(0);
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/* Check layout version for EEPROM data */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uchar *) &version, 2);
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if (ret != 0) {
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
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}
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version = be16_to_cpu(version);
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if (version < 1 || version > 3) {
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printf("Error: unknown version %d for EEPROM data\n",
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version);
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return -1;
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}
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/* Read Ethernet MAC address from EEPROM */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac, 6);
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if (ret != 0) {
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
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}
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if (lacie_read_mac_address(mac) == 0)
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eth_setenv_enetaddr("ethaddr", mac);
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}
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#endif /* CONFIG_CMD_I2C */
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#endif
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return 0;
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}
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#endif
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void mv_phy_88e1116_init(char *name)
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{
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u16 reg;
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u16 devadr;
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if (miiphy_set_current_dev(name))
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return;
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/* command to read PHY dev address */
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if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
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printf("Err..(%s) could not read PHY dev address\n", __func__);
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return;
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}
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/*
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* Enable RGMII delay on Tx and Rx for CPU port
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* Ref: sec 4.7.2 of chip datasheet
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*/
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
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miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
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reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
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miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
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/* reset the phy */
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if (miiphy_read(name, devadr, MII_BMCR, ®) != 0) {
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printf("Err..(%s) PHY status read failed\n", __func__);
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return;
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}
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if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
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printf("Err..(%s) PHY reset failed\n", __func__);
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return;
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}
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debug("88E1116 Initialized on %s\n", name);
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}
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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/* Configure and initialize PHY */
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void reset_phy(void)
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{
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mv_phy_88e1116_init("egiga0");
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}
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#endif
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#if defined(CONFIG_KIRKWOOD_GPIO)
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/* Return GPIO push button status */
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static int
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do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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@ -186,3 +123,4 @@ do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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U_BOOT_CMD(button, 1, 1, do_read_push_button,
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"Return GPIO push button status 0=off 1=on", "");
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#endif
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@ -32,12 +32,4 @@
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/* Buttons */
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#define NET2BIG_V2_GPIO_PUSH_BUTTON 34
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/* PHY related */
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#define MV88E1116_LED_FCTRL_REG 10
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#define MV88E1116_CPRSP_CR3_REG 21
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#define MV88E1116_MAC_CTRL_REG 21
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#define MV88E1116_PGADR_REG 22
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#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
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#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
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#endif /* NET2BIG_V2_H */
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@ -21,10 +21,13 @@
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).o
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COBJS := netspace_v2.o
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COBJS := $(BOARD).o ../common/common.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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|
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@ -21,15 +21,14 @@
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <command.h>
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#include <i2c.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/kirkwood.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/gpio.h>
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#include "netspace_v2.h"
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#include "../common/common.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -90,91 +89,29 @@ int board_init(void)
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return 0;
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}
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#if defined(CONFIG_MISC_INIT_R)
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int misc_init_r(void)
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{
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
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if (!getenv("ethaddr")) {
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ushort version;
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uchar mac[6];
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int ret;
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/* I2C-0 for on-board EEPROM */
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i2c_set_bus_num(0);
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/* Check layout version for EEPROM data */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uchar *) &version, 2);
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if (ret != 0) {
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
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}
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version = be16_to_cpu(version);
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if (version < 1 || version > 3) {
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printf("Error: unknown version %d for EEPROM data\n",
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version);
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return -1;
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}
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/* Read Ethernet MAC address from EEPROM */
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac, 6);
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if (ret != 0) {
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printf("Error: failed to read I2C EEPROM @%02x\n",
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CONFIG_SYS_I2C_EEPROM_ADDR);
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return ret;
|
||||
}
|
||||
if (lacie_read_mac_address(mac) == 0)
|
||||
eth_setenv_enetaddr("ethaddr", mac);
|
||||
}
|
||||
#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
void mv_phy_88e1116_init(char *name)
|
||||
{
|
||||
u16 reg;
|
||||
u16 devadr;
|
||||
|
||||
if (miiphy_set_current_dev(name))
|
||||
return;
|
||||
|
||||
/* command to read PHY dev address */
|
||||
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
|
||||
printf("Err..(%s) could not read PHY dev address\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable RGMII delay on Tx and Rx for CPU port
|
||||
* Ref: sec 4.7.2 of chip datasheet
|
||||
*/
|
||||
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
|
||||
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
|
||||
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
|
||||
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
|
||||
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
|
||||
|
||||
/* reset the phy */
|
||||
if (miiphy_read(name, devadr, MII_BMCR, ®) != 0) {
|
||||
printf("Err..(%s) PHY status read failed\n", __func__);
|
||||
return;
|
||||
}
|
||||
if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
|
||||
printf("Err..(%s) PHY reset failed\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
debug("88E1116 Initialized on %s\n", name);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
|
||||
/* Configure and initialize PHY */
|
||||
void reset_phy(void)
|
||||
{
|
||||
mv_phy_88e1116_init("egiga0");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KIRKWOOD_GPIO)
|
||||
/* Return GPIO button status */
|
||||
static int
|
||||
do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
|
|
@ -184,3 +121,4 @@ do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
|||
|
||||
U_BOOT_CMD(button, 1, 1, do_read_button,
|
||||
"Return GPIO button status 0=off 1=on", "");
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -31,12 +31,4 @@
|
|||
|
||||
#define NETSPACE_V2_GPIO_BUTTON 32
|
||||
|
||||
/* PHY related */
|
||||
#define MV88E1116_LED_FCTRL_REG 10
|
||||
#define MV88E1116_CPRSP_CR3_REG 21
|
||||
#define MV88E1116_MAC_CTRL_REG 21
|
||||
#define MV88E1116_PGADR_REG 22
|
||||
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
|
||||
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
|
||||
|
||||
#endif /* NETSPACE_V2_H */
|
||||
|
|
|
|||
|
|
@ -140,10 +140,10 @@ km_kirkwood arm arm926ejs km_arm keymile
|
|||
km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_RECONFIG_XLX
|
||||
mgcoge3un arm arm926ejs km_arm keymile kirkwood
|
||||
portl2 arm arm926ejs km_arm keymile kirkwood
|
||||
inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2
|
||||
net2big_v2 arm arm926ejs net2big_v2 LaCie kirkwood
|
||||
netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2
|
||||
netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2
|
||||
inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:INETSPACE_V2
|
||||
net2big_v2 arm arm926ejs net2big_v2 LaCie kirkwood lacie_kw:NET2BIG_V2
|
||||
netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_V2
|
||||
netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_MAX_V2
|
||||
dreamplug arm arm926ejs - Marvell kirkwood
|
||||
guruplug arm arm926ejs - Marvell kirkwood
|
||||
mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
|
||||
|
|
|
|||
|
|
@ -15,8 +15,8 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _CONFIG_NETSPACE_V2_H
|
||||
#define _CONFIG_NETSPACE_V2_H
|
||||
#ifndef _CONFIG_LACIE_KW_H
|
||||
#define _CONFIG_LACIE_KW_H
|
||||
|
||||
/*
|
||||
* Machine number definition
|
||||
|
|
@ -30,6 +30,9 @@
|
|||
#elif defined(CONFIG_NETSPACE_MAX_V2)
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2
|
||||
#define CONFIG_IDENT_STRING " NS Max v2"
|
||||
#elif defined(CONFIG_NET2BIG_V2)
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2
|
||||
#define CONFIG_IDENT_STRING " 2Big v2"
|
||||
#else
|
||||
#error "Unknown board"
|
||||
#endif
|
||||
|
|
@ -56,11 +59,19 @@
|
|||
#define CONFIG_CMD_USB
|
||||
|
||||
/*
|
||||
* Core clock definition.
|
||||
* Core clock definition
|
||||
*/
|
||||
#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
|
||||
|
||||
/*
|
||||
* SDRAM configuration
|
||||
*/
|
||||
#if defined(CONFIG_NET2BIG_V2)
|
||||
#define CONFIG_NR_DRAM_BANKS 2
|
||||
#else
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_INETSPACE_V2
|
||||
/* Different SDRAM configuration and size for Internet Space v2 */
|
||||
#define CONFIG_SYS_KWD_CONFIG ($(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-is2.cfg)
|
||||
|
|
@ -81,7 +92,11 @@
|
|||
#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
|
||||
#define CONFIG_SYS_IDE_MAXBUS 1
|
||||
#define CONFIG_SYS_IDE_MAXDEVICE 1
|
||||
#if defined(CONFIG_NET2BIG_V2)
|
||||
#define CONFIG_SYS_PROMPT "2big2> "
|
||||
#else
|
||||
#define CONFIG_SYS_PROMPT "ns2> "
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Ethernet Driver configuration
|
||||
|
|
@ -97,11 +112,10 @@
|
|||
*/
|
||||
#ifdef CONFIG_MVSATA_IDE
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
|
||||
/* Network Space Max v2 use 2 SATA ports */
|
||||
#ifdef CONFIG_NETSPACE_MAX_V2
|
||||
#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_NET2BIG_V2)
|
||||
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
|
||||
#endif
|
||||
#endif
|
||||
#endif /* CONFIG_MVSATA_IDE */
|
||||
|
||||
/*
|
||||
* Enable GPI0 support
|
||||
|
|
@ -176,4 +190,4 @@
|
|||
"usbload=usb start && " \
|
||||
"fatload usb 0:1 $loadaddr /boot/$bootfile\0"
|
||||
|
||||
#endif /* _CONFIG_NETSPACE_V2_H */
|
||||
#endif /* _CONFIG_LACIE_KW_H */
|
||||
|
|
@ -1,161 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _CONFIG_NET2BIG_V2_H
|
||||
#define _CONFIG_NET2BIG_V2_H
|
||||
|
||||
/*
|
||||
* Machine number information
|
||||
*/
|
||||
#define CONFIG_IDENT_STRING " 2Big v2"
|
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change)
|
||||
*/
|
||||
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
|
||||
#define CONFIG_KIRKWOOD /* SOC Family Name */
|
||||
#define CONFIG_KW88F6281 /* SOC Name */
|
||||
#define CONFIG_MACH_NET2BIG_V2 /* Machine type */
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
|
||||
|
||||
/*
|
||||
* Commands configuration
|
||||
*/
|
||||
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_USB
|
||||
|
||||
/*
|
||||
* Core clock definition.
|
||||
*/
|
||||
#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
|
||||
|
||||
/*
|
||||
* mv-common.h should be defined after CMD configs since it used them
|
||||
* to enable certain macros
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 2
|
||||
#include "mv-common.h"
|
||||
|
||||
/* Remove or override few declarations from mv-common.h */
|
||||
#undef CONFIG_RBTREE
|
||||
#undef CONFIG_ENV_SPI_MAX_HZ
|
||||
#undef CONFIG_SYS_IDE_MAXBUS
|
||||
#undef CONFIG_SYS_IDE_MAXDEVICE
|
||||
#undef CONFIG_SYS_PROMPT
|
||||
#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
|
||||
#define CONFIG_SYS_IDE_MAXBUS 1
|
||||
#define CONFIG_SYS_IDE_MAXDEVICE 1
|
||||
#define CONFIG_SYS_PROMPT "2big2> "
|
||||
|
||||
/*
|
||||
* Ethernet Driver configuration
|
||||
*/
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_MISC_INIT_R /* Call misc_init_r() to initialize MAC address */
|
||||
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
|
||||
#define CONFIG_NETCONSOLE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SATA Driver configuration
|
||||
*/
|
||||
#ifdef CONFIG_MVSATA_IDE
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
|
||||
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Enable GPI0 support
|
||||
*/
|
||||
#define CONFIG_KIRKWOOD_GPIO
|
||||
|
||||
/*
|
||||
* Enable I2C support
|
||||
*/
|
||||
#ifdef CONFIG_CMD_I2C
|
||||
/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */
|
||||
#endif /* CONFIG_CMD_I2C */
|
||||
|
||||
/*
|
||||
* File systems support
|
||||
*/
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
|
||||
/*
|
||||
* Use the HUSH parser
|
||||
*/
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
/*
|
||||
* Console configuration
|
||||
*/
|
||||
#define CONFIG_CONSOLE_MUX
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
|
||||
/*
|
||||
* Enable device tree support
|
||||
*/
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
/*
|
||||
* Environment variables configurations
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64KB */
|
||||
#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
|
||||
#define CONFIG_ENV_ADDR 0x70000
|
||||
#define CONFIG_ENV_OFFSET 0x70000 /* env starts here */
|
||||
|
||||
/*
|
||||
* Default environment variables
|
||||
*/
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"dhcp && run netconsole; " \
|
||||
"if run usbload || run diskload; then bootm; fi"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"stdin=serial\0" \
|
||||
"stdout=serial\0" \
|
||||
"stderr=serial\0" \
|
||||
"bootfile=uImage\0" \
|
||||
"loadaddr=0x800000\0" \
|
||||
"autoload=no\0" \
|
||||
"netconsole=" \
|
||||
"set stdin $stdin,nc; " \
|
||||
"set stdout $stdout,nc; " \
|
||||
"set stderr $stderr,nc;\0" \
|
||||
"diskload=ide reset && " \
|
||||
"ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \
|
||||
"usbload=usb start && " \
|
||||
"fatload usb 0:1 $loadaddr /boot/$bootfile\0"
|
||||
|
||||
#endif /* _CONFIG_NET2BIG_V2_H */
|
||||
Loading…
Reference in a new issue