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https://github.com/AsahiLinux/u-boot
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sun6i: dram: Do not try to initialize a second dram chan on A31s
The A31s only has one dram channel, so do not bother with trying to initialize a second channel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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parent
10191ed098
commit
7582e39eb0
2 changed files with 15 additions and 7 deletions
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@ -10,6 +10,7 @@
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obj-y += timer.o
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obj-y += board.o
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obj-y += clock.o
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obj-y += cpu_info.o
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obj-y += pinmux.o
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obj-$(CONFIG_MACH_SUN6I) += prcm.o
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obj-$(CONFIG_MACH_SUN8I) += prcm.o
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@ -21,7 +22,6 @@ obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o
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obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o
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ifndef CONFIG_SPL_BUILD
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obj-y += cpu_info.o
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ifdef CONFIG_ARMV7_PSCI
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obj-y += psci.o
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endif
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@ -369,18 +369,26 @@ unsigned long sunxi_dram_init(void)
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.rows = 16,
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};
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/* A31s only has one channel */
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if (sunxi_get_ss_bonding_id() == SUNXI_SS_BOND_ID_A31S)
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para.chan = 1;
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mctl_sys_init();
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mctl_dll_init(0, ¶);
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mctl_dll_init(1, ¶);
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setbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN);
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setbits_le32(&mctl_com->ccr,
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MCTL_CCR_MASTER_CLK_EN |
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MCTL_CCR_CH0_CLK_EN |
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MCTL_CCR_CH1_CLK_EN);
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if (para.chan == 2) {
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mctl_dll_init(1, ¶);
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setbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN);
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}
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setbits_le32(&mctl_com->ccr, MCTL_CCR_MASTER_CLK_EN);
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mctl_channel_init(0, ¶);
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mctl_channel_init(1, ¶);
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if (para.chan == 2)
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mctl_channel_init(1, ¶);
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mctl_com_init(¶);
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mctl_port_cfg();
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