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tegra: dts: Sync tegra124.dtsi with linux kernel
Sync this up with Linux v3.18-rc5. Exclude features that are unlikely to supported in U-Boot soon (regulators, pinmux). Also the addresses are updated to 32-bit. Otherwise it is the same. Also bring in the dt-bindings for pinctrl. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
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Simon Glass
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6ee350bb93
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2 changed files with 159 additions and 0 deletions
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@ -1,5 +1,6 @@
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#include <dt-bindings/clock/tegra124-car.h>
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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@ -192,6 +193,16 @@
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status = "disabled";
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};
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pwm: pwm@7000a000 {
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compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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clocks = <&tegra_car TEGRA124_CLK_PWM>;
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resets = <&tegra_car 17>;
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reset-names = "pwm";
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status = "disabled";
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};
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spi@7000d400 {
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compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
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reg = <0x7000d400 0x200>;
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@ -290,6 +301,109 @@
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status = "disabled";
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};
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ahub@70300000 {
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compatible = "nvidia,tegra124-ahub";
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reg = <0x70300000 0x200>,
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<0x70300800 0x800>,
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<0x70300200 0x600>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_D_AUDIO>,
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<&tegra_car TEGRA124_CLK_APBIF>;
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clock-names = "d_audio", "apbif";
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resets = <&tegra_car 106>, /* d_audio */
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<&tegra_car 107>, /* apbif */
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<&tegra_car 30>, /* i2s0 */
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<&tegra_car 11>, /* i2s1 */
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<&tegra_car 18>, /* i2s2 */
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<&tegra_car 101>, /* i2s3 */
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<&tegra_car 102>, /* i2s4 */
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<&tegra_car 108>, /* dam0 */
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<&tegra_car 109>, /* dam1 */
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<&tegra_car 110>, /* dam2 */
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<&tegra_car 10>, /* spdif */
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<&tegra_car 153>, /* amx */
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<&tegra_car 185>, /* amx1 */
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<&tegra_car 154>, /* adx */
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<&tegra_car 180>, /* adx1 */
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<&tegra_car 186>, /* afc0 */
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<&tegra_car 187>, /* afc1 */
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<&tegra_car 188>, /* afc2 */
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<&tegra_car 189>, /* afc3 */
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<&tegra_car 190>, /* afc4 */
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<&tegra_car 191>; /* afc5 */
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reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
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"i2s3", "i2s4", "dam0", "dam1", "dam2",
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"spdif", "amx", "amx1", "adx", "adx1",
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"afc0", "afc1", "afc2", "afc3", "afc4", "afc5";
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dmas = <&apbdma 1>, <&apbdma 1>,
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<&apbdma 2>, <&apbdma 2>,
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<&apbdma 3>, <&apbdma 3>,
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<&apbdma 4>, <&apbdma 4>,
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<&apbdma 6>, <&apbdma 6>,
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<&apbdma 7>, <&apbdma 7>,
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<&apbdma 12>, <&apbdma 12>,
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<&apbdma 13>, <&apbdma 13>,
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<&apbdma 14>, <&apbdma 14>,
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<&apbdma 29>, <&apbdma 29>;
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dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
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"rx3", "tx3", "rx4", "tx4", "rx5", "tx5",
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"rx6", "tx6", "rx7", "tx7", "rx8", "tx8",
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"rx9", "tx9";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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tegra_i2s0: i2s@70301000 {
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compatible = "nvidia,tegra124-i2s";
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reg = <0x70301000 0x100>;
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nvidia,ahub-cif-ids = <4 4>;
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clocks = <&tegra_car TEGRA124_CLK_I2S0>;
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resets = <&tegra_car 30>;
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reset-names = "i2s";
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status = "disabled";
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};
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tegra_i2s1: i2s@70301100 {
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compatible = "nvidia,tegra124-i2s";
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reg = <0x70301100 0x100>;
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nvidia,ahub-cif-ids = <5 5>;
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clocks = <&tegra_car TEGRA124_CLK_I2S1>;
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resets = <&tegra_car 11>;
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reset-names = "i2s";
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status = "disabled";
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};
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tegra_i2s2: i2s@70301200 {
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compatible = "nvidia,tegra124-i2s";
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reg = <0x70301200 0x100>;
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nvidia,ahub-cif-ids = <6 6>;
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clocks = <&tegra_car TEGRA124_CLK_I2S2>;
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resets = <&tegra_car 18>;
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reset-names = "i2s";
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status = "disabled";
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};
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tegra_i2s3: i2s@70301300 {
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compatible = "nvidia,tegra124-i2s";
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reg = <0x70301300 0x100>;
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nvidia,ahub-cif-ids = <7 7>;
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clocks = <&tegra_car TEGRA124_CLK_I2S3>;
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resets = <&tegra_car 101>;
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reset-names = "i2s";
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status = "disabled";
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};
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tegra_i2s4: i2s@70301400 {
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compatible = "nvidia,tegra124-i2s";
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reg = <0x70301400 0x100>;
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nvidia,ahub-cif-ids = <8 8>;
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clocks = <&tegra_car TEGRA124_CLK_I2S4>;
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resets = <&tegra_car 102>;
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reset-names = "i2s";
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status = "disabled";
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};
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};
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usb@7d000000 {
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compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
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reg = <0x7d000000 0x4000>;
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45
include/dt-bindings/pinctrl/pinctrl-tegra.h
Normal file
45
include/dt-bindings/pinctrl/pinctrl-tegra.h
Normal file
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@ -0,0 +1,45 @@
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/*
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* This header provides constants for Tegra pinctrl bindings.
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*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Laxman Dewangan <ldewangan@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_H
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/*
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* Enable/disable for diffeent dt properties. This is applicable for
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* properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
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* nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
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*/
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#define TEGRA_PIN_DISABLE 0
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#define TEGRA_PIN_ENABLE 1
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#define TEGRA_PIN_PULL_NONE 0
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#define TEGRA_PIN_PULL_DOWN 1
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#define TEGRA_PIN_PULL_UP 2
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/* Low power mode driver */
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#define TEGRA_PIN_LP_DRIVE_DIV_8 0
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#define TEGRA_PIN_LP_DRIVE_DIV_4 1
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#define TEGRA_PIN_LP_DRIVE_DIV_2 2
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#define TEGRA_PIN_LP_DRIVE_DIV_1 3
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/* Rising/Falling slew rate */
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#define TEGRA_PIN_SLEW_RATE_FASTEST 0
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#define TEGRA_PIN_SLEW_RATE_FAST 1
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#define TEGRA_PIN_SLEW_RATE_SLOW 2
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#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
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#endif
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