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powerpc/mpc85xx:No NOR boot, do not compile IFC errata A003399
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or no NOR boot, do not compile its workaround. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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4 changed files with 17 additions and 6 deletions
4
README
4
README
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@ -413,6 +413,10 @@ The following options need to be configured:
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See Freescale App Note 4493 for more information about
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See Freescale App Note 4493 for more information about
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this erratum.
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this erratum.
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CONFIG_A003399_NOR_WORKAROUND
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Enables a workaround for IFC erratum A003399. It is only
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requred during NOR boot.
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CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
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CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
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This is the value to write into CCSR offset 0x18600
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This is the value to write into CCSR offset 0x18600
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@ -25,7 +25,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT)
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#ifdef CONFIG_A003399_NOR_WORKAROUND
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void setup_ifc(void)
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void setup_ifc(void)
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{
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{
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struct fsl_ifc *ifc_regs = (void *)CONFIG_SYS_IFC_ADDR;
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struct fsl_ifc *ifc_regs = (void *)CONFIG_SYS_IFC_ADDR;
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@ -99,7 +99,7 @@ void cpu_init_early_f(void)
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#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
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#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#endif
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#endif
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#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT)
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#ifdef CONFIG_A003399_NOR_WORKAROUND
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ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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u32 *dst, *src;
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u32 *dst, *src;
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void (*setup_ifc_sram)(void);
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void (*setup_ifc_sram)(void);
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@ -138,7 +138,7 @@ void cpu_init_early_f(void)
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* Work Around for IFC Erratum A003399, issue will hit only when execution
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* Work Around for IFC Erratum A003399, issue will hit only when execution
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* from NOR Flash
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* from NOR Flash
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*/
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*/
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#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT)
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#ifdef CONFIG_A003399_NOR_WORKAROUND
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#define SRAM_BASE_ADDR (0x00000000)
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#define SRAM_BASE_ADDR (0x00000000)
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/* TLB for SRAM */
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/* TLB for SRAM */
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mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(9);
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mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(9);
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@ -43,7 +43,7 @@ void init_early_memctl_regs(void)
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set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
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set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
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set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
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set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
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#if !defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) || defined(CONFIG_SYS_RAMBOOT)
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#ifndef CONFIG_A003399_NOR_WORKAROUND
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#ifdef CONFIG_SYS_CSPR0_EXT
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#ifdef CONFIG_SYS_CSPR0_EXT
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set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
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set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
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#endif
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#endif
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@ -31,10 +31,10 @@
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#define CONFIG_PHYS_64BIT
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#define CONFIG_PHYS_64BIT
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#endif
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#endif
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#ifdef CONFIG_P1010RDB
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#define CONFIG_P1010
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#define CONFIG_P1010
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#define CONFIG_E500 /* BOOKE e500 family */
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#include <asm/config_mpc85xx.h>
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#define CONFIG_NAND_FSL_IFC
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#define CONFIG_NAND_FSL_IFC
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#endif
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#ifdef CONFIG_SDCARD
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#ifdef CONFIG_SDCARD
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#define CONFIG_RAMBOOT_SDCARD
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#define CONFIG_RAMBOOT_SDCARD
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@ -429,6 +429,13 @@ extern unsigned long get_sdram_size(void);
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#undef CONFIG_SYS_RAMBOOT
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#undef CONFIG_SYS_RAMBOOT
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#endif
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#endif
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#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399
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#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT)\
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&& !defined(CONFIG_SECURE_BOOT)
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#define CONFIG_A003399_NOR_WORKAROUND
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#endif
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#endif
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#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
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#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CONFIG_BOARD_EARLY_INIT_R
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