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https://github.com/AsahiLinux/u-boot
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ppc4xx: HCU4/5. Cleanups
- Fix some coding style violations. - Use in/out_u16/32 where appropriate. - Use register names from ppc405.h. - Fix trace useage for Lauterbach. - Remove obsolete generation HCU2. - Renamed fixed_hcu4_sdram to init_ppc405_sdram. Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
This commit is contained in:
parent
8cc10d06b8
commit
74973126d1
7 changed files with 69 additions and 80 deletions
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@ -44,7 +44,7 @@ void show_sdram_registers(void)
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}
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#endif
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long int fixed_hcu4_sdram (unsigned int dram_size)
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long int init_ppc405_sdram(unsigned int dram_size)
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{
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#ifdef DEBUG
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printf(__FUNCTION__);
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@ -21,18 +21,6 @@
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* MA 02111-1307 USA
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*/
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/*
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* Modified 4/5/2001
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* Wait for completion of each sector erase command issued
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* 4/5/2001
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* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
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*
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* Modified 6/6/2007
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* Added isync
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* Niklaus Giger, Netstal Maschinen, niklaus.giger@netstal.com
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*
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*/
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#include <common.h>
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#include <ppc4xx.h>
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#include <asm/processor.h>
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@ -387,7 +375,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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#if 0
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/*
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* We wait for the last triggered sector
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*/
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@ -396,7 +383,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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wait_for_DQ7 (info, l_sect);
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DONE:
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#endif
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/* reset to read mode */
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addr = (FLASH_WORD_SIZE *) info->start[0];
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addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
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@ -27,8 +27,7 @@ extern void set_params_for_sw_install(int install_requested, char *board_name );
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extern void common_misc_init_r(void);
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enum {
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/* HW_GENERATION_HCU1 is no longer supported */
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HW_GENERATION_HCU2 = 0x10,
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/* HW_GENERATION_HCU1/2 is no longer supported */
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HW_GENERATION_HCU3 = 0x10,
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HW_GENERATION_HCU4 = 0x20,
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HW_GENERATION_HCU5 = 0x30,
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@ -36,3 +35,11 @@ enum {
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HW_GENERATION_MCU20 = 0x0a,
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HW_GENERATION_MCU25 = 0x09,
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};
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#ifdef CONFIG_405GP
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#if defined(DEBUG)
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void show_sdram_registers(void);
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#endif
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long int init_ppc405_sdram(unsigned int dram_size);
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#endif
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@ -29,8 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
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typedef struct {u8 id; char *name;} generation_info;
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generation_info generations[7] = {
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{HW_GENERATION_HCU2, "HCU2"},
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generation_info generations[6] = {
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{HW_GENERATION_HCU3, "HCU3"},
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{HW_GENERATION_HCU4, "HCU4"},
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{HW_GENERATION_HCU5, "HCU5"},
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@ -134,3 +133,4 @@ void common_misc_init_r(void)
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saveenv();
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}
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}
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@ -1,5 +1,5 @@
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/*
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*(C) Copyright 2005-2007 Netstal Maschinen AG
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*(C) Copyright 2005-2008 Netstal Maschinen AG
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* Niklaus Giger (Niklaus.Giger@netstal.com)
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*
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* This source code is free software; you can redistribute it
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@ -28,17 +28,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
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#define SYS_SLOT_ADDRESS (0x7C000000 + 0x400000)
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#define HCU3_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
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#define HCU_SLOT_ADDRESS (0x7C000000 + 0x400000)
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#define HCU_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
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#define HCU_SW_INSTALL_REQUESTED 0x10
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#undef DEBUG
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#if defined(DEBUG)
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void show_sdram_registers(void);
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#endif
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long int fixed_hcu4_sdram (unsigned int dram_size);
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/*
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* This function is run very early, out of flash, and before devices are
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* initialized. It is called by lib_ppc/board.c:board_init_f by virtue
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@ -49,17 +42,12 @@ long int fixed_hcu4_sdram (unsigned int dram_size);
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* anything, not even stack. So be careful.
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*/
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#define CPC0_CR0 0xb1 /* Chip control register 0 */
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#define CPC0_CR1 0xb2 /* Chip control register 1 */
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/* Attention: If you want 1 microsecs times from the external oscillator
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* use 0x00804051. But this causes problems with u-boot and linux!
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* 0x00004051 is okay for u-boot/linux, but different from old vxworks values
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* 0x00804051 causes problems with u-boot and linux!
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*/
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#define CPC0_CR0_VALUE 0x0030103c
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#define CPC0_CR1_VALUE 0x00004051
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#define CPC0_ECR 0xaa /* Edge condition register */
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#define EBC0_CFG 0x23 /* External Peripheral Control Register */
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#define CPC0_EIRR 0xb6 /* External Interrupt Register */
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int board_early_init_f (void)
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{
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@ -70,16 +58,16 @@ int board_early_init_f (void)
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* IRQ 17-24 RESERVED/UNUSED
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* IRQ 31 (EXT IRQ 6) (unused)
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*/
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr (uicer, 0x00000000); /* disable all ints */
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mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
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mtdcr (uicpr, 0xFFFFE000); /* set int polarities */
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mtdcr (uictr, 0x00000000); /* set int trigger levels */
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicer, 0x00000000); /* disable all ints */
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mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
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mtdcr(uicpr, 0xFFFFE000); /* set int polarities */
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mtdcr(uictr, 0x00000000); /* set int trigger levels */
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
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mtdcr(CPC0_ECR, 0x60606000);
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mtdcr(CPC0_EIRR, 0x7c000000);
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mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
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mtdcr(CPC0_ECR, 0x60606000);
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mtdcr(CPC0_EIRR, 0x7C000000);
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return 0;
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}
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@ -93,18 +81,19 @@ int board_pre_init (void)
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int sys_install_requested(void)
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{
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u16 *ioValuePtr = (u16 *)HCU3_DIGITAL_IO_REGISTER;
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return (in_be16(ioValuePtr) & HCU_SW_INSTALL_REQUESTED) != 0;
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u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER);
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return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0;
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}
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int checkboard (void)
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{
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u16 *boardVersReg = (u16 *)HCU_MACH_VERSIONS_REGISTER;
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u16 generation = in_be16(boardVersReg) & 0xf0;
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u16 index = in_be16(boardVersReg) & 0x0f;
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u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
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u16 generation = boardVersReg & 0xf0;
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u16 index = boardVersReg & 0x0f;
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/* Cannot be done in board_early_init */
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mtdcr(cntrl0, CPC0_CR0_VALUE);
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/* Cannot be done, in board_early_init */
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mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
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/* Force /RTS to active. The board it not wired quite
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* correctly to use cts/rtc flow control, so just force the
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* /RST active and forget about it.
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@ -145,8 +134,8 @@ void sdram_init(void)
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*/
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u32 hcu_get_slot(void)
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{
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u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
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return in_be16(slot) & 0x7f;
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u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS);
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return slot & 0x7f;
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}
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/*
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@ -154,12 +143,12 @@ u32 hcu_get_slot(void)
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*/
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u32 get_serial_number(void)
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{
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u32 *serial = (u32 *)CFG_FLASH_BASE;
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u32 serial = in_be32((u32 *)CFG_FLASH_BASE);
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if (in_be32(serial) == 0xffffffff)
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if (serial == 0xffffffff)
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return 0;
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return in_be32(serial);
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return serial;
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}
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long int initdram(int board_type)
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{
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long dram_size = 0;
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u16 *boardVersReg = (u16 *) HCU_MACH_VERSIONS_REGISTER;
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u16 generation = in_be16(boardVersReg) & 0xf0;
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if (generation == HW_GENERATION_HCU3)
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dram_size = 32*1024*1024;
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else dram_size = 64*1024*1024;
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fixed_hcu4_sdram(dram_size);
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u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
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u16 generation = boardVersReg & 0xf0;
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u16 index = boardVersReg & 0x0f;
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if (generation == HW_GENERATION_HCU3 && index < 0xf)
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dram_size = 32 << 20; /* 32 MB - RAM */
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else
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dram_size = 64 << 20; /* 64 MB - RAM */
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init_ppc405_sdram(dram_size);
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#ifdef DEBUG
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show_sdram_registers();
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@ -309,15 +309,13 @@ int misc_init_r(void)
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*/
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if (mfspr(dbcr0) & 0x80000000) {
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/* External debugger alive
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* enable trace facilty for Lauterback
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* CCR0[DAPUIB]=0 Enable broadcast of instruction data
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* to auxiliary processor interface
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* enable trace facilty for Lauterbach
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* CCR0[DTB]=0 Enable broadcast of trace information
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* SDR0_PFC0[TRE] Trace signals are enabled instead of
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* GPIO49-63
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*/
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mtspr(ccr0, mfspr(ccr0) &~ 0x00108000);
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mtsdr(SDR0_PFC0, sdr0_pfc1 | 0x00000100);
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mtspr(ccr0, mfspr(ccr0) &~ (CCR0_DTB));
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mtsdr(SDR0_PFC0, sdr0_pfc1 | SDR0_PFC0_TRE_ENABLE);
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}
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return 0;
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}
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@ -165,19 +165,25 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes)
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u32 val;
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char str[] = "ECC generation -";
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#if defined(CONFIG_PRAM)
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u32 *magic;
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u32 *magicPtr;
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u32 magic;
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/* Check whether vxWorks is using EDR logging, if yes zero */
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/* also PostMortem and user reserved memory */
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magic = (u32 *)in_be32((u32 *)(start_address + num_bytes -
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(CONFIG_PRAM*1024) + sizeof(u32)));
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debug("\n%s: CONFIG_PRAM %d kB magic 0x%x 0x%p -> 0x%x\n", __FUNCTION__,
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CONFIG_PRAM,
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start_address + num_bytes - (CONFIG_PRAM*1024) + sizeof(u32),
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magic, in_be32(magic));
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if (in_be32(magic) == 0xbeefbabe)
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num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM;
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if ((mfspr(dbcr0) & 0x80000000) == 0) {
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/* only if no external debugger is alive!
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* Check whether vxWorks is using EDR logging, if yes zero
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* also PostMortem and user reserved memory
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*/
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magicPtr = (u32 *)(start_address + num_bytes -
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(CONFIG_PRAM*1024) + sizeof(u32));
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magic = in_be32(magicPtr);
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debug("%s: CONFIG_PRAM %d kB magic 0x%x 0x%p\n",
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__FUNCTION__, CONFIG_PRAM,
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magicPtr, magic);
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if (magic == 0xbeefbabe) {
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printf("%s: preserving at %p\n", __FUNCTION__, magicPtr);
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num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM;
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}
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}
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#endif
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sync();
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