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rockchip: rk3288: dts: Make core devices available early

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In SPL we need access to the CRU and other peripherals so we can set up
SDRAM. Mark these so that they will remain in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2015-08-30 16:55:21 -06:00
parent 344c837686
commit 73a88d0e44
1 changed files with 15 additions and 0 deletions
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15
arch/arm/dts/rk3288.dtsi
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@ -16,6 +16,15 @@
interrupt-parent = <&gic>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &gpio5;
gpio6 = &gpio6;
gpio7 = &gpio7;
gpio8 = &gpio8;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@ -454,6 +463,7 @@
};
dmc: dmc@ff610000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-dmc", "syscon";
rockchip,cru = <&cru>;
rockchip,grf = <&grf>;
@ -569,11 +579,13 @@
};
pmu: power-management@ff730000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff730000 0x100>;
};
sgrf: syscon@ff740000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-sgrf", "syscon";
reg = <0xff740000 0x1000>;
};
@ -582,6 +594,7 @@
compatible = "rockchip,rk3288-cru";
reg = <0xff760000 0x1000>;
rockchip,grf = <&grf>;
u-boot,dm-pre-reloc;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
@ -600,6 +613,7 @@
};
grf: syscon@ff770000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-grf", "syscon";
reg = <0xff770000 0x1000>;
};
@ -804,6 +818,7 @@
};
noc: syscon@ffac0000 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3288-noc", "syscon";
reg = <0xffac0000 0x2000>;
};