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arm64: dts: ti: k3-am65: add mcu navss nodes
Add DT node for MCU NAVSS its components to get DMA working on AM654 SoC. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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@ -4,6 +4,7 @@
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*/
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*/
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#include <dt-bindings/pinctrl/k3-am65.h>
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#include <dt-bindings/pinctrl/k3-am65.h>
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#include <dt-bindings/dma/k3-udma.h>
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/ {
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/ {
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chosen {
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chosen {
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@ -63,6 +64,52 @@
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pinctrl-single,register-width = <32>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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};
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navss_mcu: navss-mcu {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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ti,sci-dev-id = <119>;
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mcu_ringacc: ringacc@2b800000 {
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compatible = "ti,am654-navss-ringacc";
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reg = <0x0 0x2b800000 0x0 0x400000>,
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<0x0 0x2b000000 0x0 0x400000>,
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<0x0 0x28590000 0x0 0x100>,
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<0x0 0x2a500000 0x0 0x40000>;
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reg-names = "rt", "fifos",
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"proxy_gcfg", "proxy_target";
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ti,num-rings = <286>;
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ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
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ti,dma-ring-reset-quirk;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <195>;
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};
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mcu_udmap: udmap@285c0000 {
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compatible = "ti,k3-navss-udmap";
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reg = <0x0 0x285c0000 0x0 0x100>,
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<0x0 0x2a800000 0x0 0x40000>,
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<0x0 0x2aa00000 0x0 0x40000>;
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reg-names = "gcfg", "rchanrt", "tchanrt";
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#dma-cells = <3>;
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ti,ringacc = <&mcu_ringacc>;
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ti,psil-base = <0x6000>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <194>;
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ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
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<0x2>; /* TX_CHAN */
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ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
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<0x4>; /* RX_CHAN */
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ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
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dma-coherent;
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};
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};
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};
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};
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&cbass_wakeup {
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&cbass_wakeup {
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