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pci: sh7751: Convert to DM and DT probing
Convert the SH7751 PCI driver to DM and add DT probing. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Marek Vasut
Marek Vasut
parent
8c2c46350d
commit
72c2f4acd7
1 changed files with 106 additions and 58 deletions
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@ -6,6 +6,7 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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@ -19,82 +20,113 @@
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#define SH7751_WCR3 (vu_long *)0xFF800010
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#define SH7751_MCR (vu_long *)0xFF800014
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#define SH7751_BCR3 (vu_short *)0xFF800050
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#define SH7751_PCICONF0 (vu_long *)0xFE200000
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#define SH7751_PCICONF1 (vu_long *)0xFE200004
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#define SH7751_PCICONF2 (vu_long *)0xFE200008
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#define SH7751_PCICONF3 (vu_long *)0xFE20000C
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#define SH7751_PCICONF4 (vu_long *)0xFE200010
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#define SH7751_PCICONF5 (vu_long *)0xFE200014
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#define SH7751_PCICONF6 (vu_long *)0xFE200018
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#define SH7751_PCICR (vu_long *)0xFE200100
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#define SH7751_PCILSR0 (vu_long *)0xFE200104
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#define SH7751_PCILSR1 (vu_long *)0xFE200108
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#define SH7751_PCILAR0 (vu_long *)0xFE20010C
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#define SH7751_PCILAR1 (vu_long *)0xFE200110
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#define SH7751_PCIMBR (vu_long *)0xFE2001C4
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#define SH7751_PCIIOBR (vu_long *)0xFE2001C8
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#define SH7751_PCIPINT (vu_long *)0xFE2001CC
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#define SH7751_PCIPINTM (vu_long *)0xFE2001D0
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#define SH7751_PCICLKR (vu_long *)0xFE2001D4
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#define SH7751_PCIBCR1 (vu_long *)0xFE2001E0
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#define SH7751_PCIBCR2 (vu_long *)0xFE2001E4
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#define SH7751_PCIWCR1 (vu_long *)0xFE2001E8
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#define SH7751_PCIWCR2 (vu_long *)0xFE2001EC
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#define SH7751_PCIWCR3 (vu_long *)0xFE2001F0
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#define SH7751_PCIMCR (vu_long *)0xFE2001F4
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#define SH7751_PCIBCR3 (vu_long *)0xFE2001F8
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#define SH7751_PCICONF0 (vu_long *)0xFE200000
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#define SH7751_PCICONF1 (vu_long *)0xFE200004
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#define SH7751_PCICONF2 (vu_long *)0xFE200008
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#define SH7751_PCICONF3 (vu_long *)0xFE20000C
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#define SH7751_PCICONF4 (vu_long *)0xFE200010
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#define SH7751_PCICONF5 (vu_long *)0xFE200014
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#define SH7751_PCICONF6 (vu_long *)0xFE200018
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#define SH7751_PCICR (vu_long *)0xFE200100
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#define SH7751_PCILSR0 (vu_long *)0xFE200104
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#define SH7751_PCILSR1 (vu_long *)0xFE200108
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#define SH7751_PCILAR0 (vu_long *)0xFE20010C
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#define SH7751_PCILAR1 (vu_long *)0xFE200110
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#define SH7751_PCIMBR (vu_long *)0xFE2001C4
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#define SH7751_PCIIOBR (vu_long *)0xFE2001C8
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#define SH7751_PCIPINT (vu_long *)0xFE2001CC
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#define SH7751_PCIPINTM (vu_long *)0xFE2001D0
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#define SH7751_PCICLKR (vu_long *)0xFE2001D4
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#define SH7751_PCIBCR1 (vu_long *)0xFE2001E0
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#define SH7751_PCIBCR2 (vu_long *)0xFE2001E4
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#define SH7751_PCIWCR1 (vu_long *)0xFE2001E8
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#define SH7751_PCIWCR2 (vu_long *)0xFE2001EC
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#define SH7751_PCIWCR3 (vu_long *)0xFE2001F0
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#define SH7751_PCIMCR (vu_long *)0xFE2001F4
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#define SH7751_PCIBCR3 (vu_long *)0xFE2001F8
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#define BCR1_BREQEN 0x00080000
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#define PCI_SH7751_ID 0x35051054
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#define PCI_SH7751R_ID 0x350E1054
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#define SH7751_PCICONF1_WCC 0x00000080
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#define SH7751_PCICONF1_PER 0x00000040
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#define SH7751_PCICONF1_BUM 0x00000004
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#define SH7751_PCICONF1_MES 0x00000002
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#define BCR1_BREQEN 0x00080000
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#define PCI_SH7751_ID 0x35051054
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#define PCI_SH7751R_ID 0x350E1054
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#define SH7751_PCICONF1_WCC 0x00000080
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#define SH7751_PCICONF1_PER 0x00000040
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#define SH7751_PCICONF1_BUM 0x00000004
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#define SH7751_PCICONF1_MES 0x00000002
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#define SH7751_PCICONF1_CMDS 0x000000C6
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#define SH7751_PCI_HOST_BRIDGE 0x6
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#define SH7751_PCICR_PREFIX 0xa5000000
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#define SH7751_PCICR_PRST 0x00000002
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#define SH7751_PCICR_CFIN 0x00000001
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#define SH7751_PCIPINT_D3 0x00000002
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#define SH7751_PCIPINT_D0 0x00000001
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#define SH7751_PCICLKR_PREFIX 0xa5000000
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#define SH7751_PCICR_PREFIX 0xa5000000
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#define SH7751_PCICR_PRST 0x00000002
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#define SH7751_PCICR_CFIN 0x00000001
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#define SH7751_PCIPINT_D3 0x00000002
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#define SH7751_PCIPINT_D0 0x00000001
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#define SH7751_PCICLKR_PREFIX 0xa5000000
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#define SH7751_PCI_MEM_BASE 0xFD000000
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#define SH7751_PCI_MEM_SIZE 0x01000000
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#define SH7751_PCI_IO_BASE 0xFE240000
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#define SH7751_PCI_IO_SIZE 0x00040000
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#define SH7751_PCI_MEM_BASE 0xFD000000
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#define SH7751_PCI_MEM_SIZE 0x01000000
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#define SH7751_PCI_IO_BASE 0xFE240000
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#define SH7751_PCI_IO_SIZE 0x00040000
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#define SH7751_PCIPAR (vu_long *)0xFE2001C0
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#define SH7751_PCIPDR (vu_long *)0xFE200220
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#define SH7751_PCIPAR (vu_long *)0xFE2001C0
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#define SH7751_PCIPDR (vu_long *)0xFE200220
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#define p4_in(addr) (*addr)
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#define p4_out(data, addr) (*addr) = (data)
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/* Double word */
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int pci_sh4_read_config_dword(struct pci_controller *hose,
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pci_dev_t dev, int offset, u32 *value)
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static int sh7751_pci_addr_valid(pci_dev_t d, uint offset)
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{
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u32 par_data = 0x80000000 | dev;
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p4_out(par_data | (offset & 0xfc), SH7751_PCIPAR);
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*value = p4_in(SH7751_PCIPDR);
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if (PCI_FUNC(d))
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return -EINVAL;
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return 0;
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}
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int pci_sh4_write_config_dword(struct pci_controller *hose,
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pci_dev_t dev, int offset, u32 value)
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static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset)
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{
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u32 par_data = 0x80000000 | dev;
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return BIT(31) | (PCI_DEV(bdf) << 8) | (offset & ~3);
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}
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p4_out(par_data | (offset & 0xfc), SH7751_PCIPAR);
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p4_out(value, SH7751_PCIPDR);
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static int sh7751_pci_read_config(struct udevice *dev, pci_dev_t bdf,
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uint offset, ulong *value,
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enum pci_size_t size)
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{
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u32 addr, reg;
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int ret;
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ret = sh7751_pci_addr_valid(bdf, offset);
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if (ret) {
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*value = pci_get_ff(size);
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return 0;
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}
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addr = get_bus_address(dev, bdf, offset);
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p4_out(addr, SH7751_PCIPAR);
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reg = p4_in(SH7751_PCIPDR);
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*value = pci_conv_32_to_size(reg, offset, size);
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return 0;
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}
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int pci_sh7751_init(struct pci_controller *hose)
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static int sh7751_pci_write_config(struct udevice *dev, pci_dev_t bdf,
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uint offset, ulong value,
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enum pci_size_t size)
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{
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u32 addr, reg, old;
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int ret;
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ret = sh7751_pci_addr_valid(bdf, offset);
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if (ret)
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return ret;
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addr = get_bus_address(dev, bdf, offset);
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p4_out(addr, SH7751_PCIPAR);
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old = p4_in(SH7751_PCIPDR);
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reg = pci_conv_size_to_32(old, value, offset, size);
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p4_out(reg, SH7751_PCIPDR);
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return 0;
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}
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static int sh7751_pci_probe(struct udevice *dev)
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{
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/* Double-check that we're a 7751 or 7751R chip */
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if (p4_in(SH7751_PCICONF0) != PCI_SH7751_ID
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@ -178,7 +210,23 @@ int pci_sh7751_init(struct pci_controller *hose)
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/* Finally, set central function init complete */
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p4_out((SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN), SH7751_PCICR);
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pci_sh4_init(hose);
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return 0;
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}
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static const struct dm_pci_ops sh7751_pci_ops = {
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.read_config = sh7751_pci_read_config,
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.write_config = sh7751_pci_write_config,
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};
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static const struct udevice_id sh7751_pci_ids[] = {
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{ .compatible = "renesas,pci-sh7751" },
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{ }
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};
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U_BOOT_DRIVER(sh7751_pci) = {
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.name = "sh7751_pci",
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.id = UCLASS_PCI,
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.of_match = sh7751_pci_ids,
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.ops = &sh7751_pci_ops,
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.probe = sh7751_pci_probe,
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};
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