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Merge https://source.denx.de/u-boot/custodians/u-boot-sh

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- rzg2_beacon updates
This commit is contained in:
Tom Rini 2022-02-26 10:21:13 -05:00
commit 7228ef9482
2 changed files with 32 additions and 4 deletions
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2
configs/rzg2_beacon_defconfig
View file

@ -62,7 +62,7 @@ CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_REGULATOR=y

34
drivers/net/ravb.c
View file

@ -52,6 +52,7 @@
#define CSR_OPS 0x0000000F
#define CSR_OPS_CONFIG BIT(1)
#define APSR_RDM BIT(13)
#define APSR_TDM BIT(14)
#define TCCR_TSRQ0 BIT(0)
@ -376,6 +377,9 @@ static int ravb_dmac_init(struct udevice *dev)
struct ravb_priv *eth = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
int ret = 0;
int mode = 0;
unsigned int delay;
bool explicit_delay = false;
/* Set CONFIG mode */
ret = ravb_reset(dev);
@ -402,9 +406,33 @@ static int ravb_dmac_init(struct udevice *dev)
(rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
return 0;
if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
(pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) {
/* Valid values are 0 and 1800, according to DT bindings */
if (delay) {
mode |= APSR_RDM;
explicit_delay = true;
}
}
if (!dev_read_u32(dev, "tx-internal-delay-ps", &delay)) {
/* Valid values are 0 and 2000, according to DT bindings */
if (delay) {
mode |= APSR_TDM;
explicit_delay = true;
}
}
if (!explicit_delay) {
if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID)
mode |= APSR_RDM;
if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
mode |= APSR_TDM;
}
writel(mode, eth->iobase + RAVB_REG_APSR);
return 0;
}