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https://github.com/AsahiLinux/u-boot
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arm: dts: ten64: syncronise device tree with Linux
This synchronises the Linux device tree with U-Boot (cp linux/..../fsl-ls1088a-ten64.dts uboot/..../fsl-ls1088a-ten64.dts), as of Linux v6.2-rc5. Missing from the U-Boot copy previously was the Ethernet PCS definitions (required for linking with PHY in Linux but not used by U-Boot) and various upstream fixes and formatting changes. The board microcontroller (which doesn't have a Linux driver) has been moved to the -u-boot.dtsi, as well as the spi0 quadspi alias (used by U-boot 'sf' but not valid for Linux). Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
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2 changed files with 45 additions and 24 deletions
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@ -3,3 +3,16 @@
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#include "fsl-ls1088a-u-boot.dtsi"
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/{
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aliases {
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spi0 = &qspi;
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};
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};
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&i2c0 {
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uc: board-controller@7e {
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compatible = "traverse,ten64-controller";
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reg = <0x7e>;
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};
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};
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@ -22,7 +22,6 @@
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aliases {
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serial0 = &duart0;
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serial1 = &duart1;
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spi0 = &qspi;
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};
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chosen {
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@ -36,18 +35,16 @@
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* external power off (e.g ATX Power Button)
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* asserted
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*/
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powerdn {
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button-powerdn {
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label = "External Power Down";
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gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
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interrupts = <&gpio1 17 IRQ_TYPE_EDGE_FALLING>;
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linux,code = <KEY_POWER>;
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};
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/* Rear Panel 'ADMIN' button (GPIO_H) */
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admin {
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button-admin {
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label = "ADMIN button";
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gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
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interrupts = <&gpio3 8 IRQ_TYPE_EDGE_RISING>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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@ -55,17 +52,17 @@
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leds {
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compatible = "gpio-leds";
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sfp1down {
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led-0 {
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label = "ten64:green:sfp1:down";
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gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
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};
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sfp2up {
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led-1 {
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label = "ten64:green:sfp2:up";
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gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
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};
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admin {
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led-2 {
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label = "ten64:admin";
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gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
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};
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@ -95,17 +92,17 @@
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/* XG1 - Upper SFP */
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&dpmac1 {
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sfp = <&sfp_xg1>;
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pcs-handle = <&pcs1>;
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phy-connection-type = "10gbase-r";
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managed = "in-band-status";
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status = "okay";
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};
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/* XG0 - Lower SFP */
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&dpmac2 {
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sfp = <&sfp_xg0>;
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pcs-handle = <&pcs2>;
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phy-connection-type = "10gbase-r";
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managed = "in-band-status";
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status = "okay";
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};
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/* DPMAC3..6 is GE4 to GE8 */
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@ -113,28 +110,28 @@
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phy-handle = <&mdio1_phy5>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs3_0>;
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};
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&dpmac4 {
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phy-handle = <&mdio1_phy6>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs3_1>;
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};
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&dpmac5 {
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phy-handle = <&mdio1_phy7>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs3_2>;
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};
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&dpmac6 {
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phy-handle = <&mdio1_phy8>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs3_3>;
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};
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/* DPMAC7..10 is GE0 to GE3 */
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phy-handle = <&mdio1_phy1>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs7_0>;
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};
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&dpmac8 {
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phy-handle = <&mdio1_phy2>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs7_1>;
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};
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&dpmac9 {
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phy-handle = <&mdio1_phy3>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs7_2>;
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};
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&dpmac10 {
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phy-handle = <&mdio1_phy4>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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pcs-handle = <&pcs7_3>;
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};
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&duart0 {
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compatible = "atmel,at97sc3204t";
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reg = <0x29>;
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};
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uc: board-controller@7e {
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compatible = "traverse,ten64-controller";
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reg = <0x7e>;
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};
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};
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&i2c2 {
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@ -253,7 +245,7 @@
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&i2c3 {
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status = "okay";
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i2c-switch@70 {
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i2c-mux@70 {
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compatible = "nxp,pca9540";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&pcs_mdio1 {
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status = "okay";
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};
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&pcs_mdio2 {
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status = "okay";
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};
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&pcs_mdio3 {
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status = "okay";
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};
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&pcs_mdio7 {
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status = "okay";
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};
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&qspi {
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status = "okay";
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