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https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
Patch queue for rpi - 2018-05-24
Some minor fixes for the Raspberry Pi: - Fix SD writes on new sdhost controller - Sanitize default load addresses, allowing for better payload placement -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJbBnlXAAoJECszeR4D/txghsYP/2n48vz7VwWI/gAGLvEzZl2T ZPVX/RKgMrWcGmEZiJVTE02OovbU9ybECOZXOAqLToQAXcGAl0OHNi+h2F/AH9+S WUZbv1wQeHD42Q3ivNjtNZY0U5D7rvVRL+33FmrHuBiLq1mUbq3uHBn7NTrCORX5 byZvQXis4JeUNefIrAynrelI7uuyaQEtwcOWbEFlh9S1tnXjbJkkaleU5TQs3tpl yjlCrFthhi9uOW/cKoqWs0GxxNsWF9/RDapTXkLvfGOS+0noHKfeYypmDuD3q1CM FmicN0t459s3H5ft/ACSa/HyAuxzkP4Zqn8vDMG+MsxYLOiklwKDLzRNj1GcvmYd Z6UmnWPII4ZRyEC8xjyL5e7ovb/RW+9g4ZVVctP+PHJCHjIMxiAdxGQ+DjYRn2Q5 T25HPXH1KTqxGwMI1LcEWfHaI7FoBSyTHy7CQrMvb7cuSDSg1lyTYSwdzsAmTX1J 4++DLpTAqi2XSNNt+DIb938xKYXwbfhSCMH3Z9oTsOfxcqiWIudqbPyMwdxsOJ73 tn6Ql2aivq9TyP5tByszQbf3Y8KoXoCtufWg8Lj2fCgsC0wAtDpEEhWI8QT2zY7q Rs+UX+eWRWKO5UOLqG1aAhJayoP2/12f9oTbo+Q1VmCgqG696J2UkezMmUjDNv/D IAXemClUO1MMY7yax8Ls =te7/ -----END PGP SIGNATURE----- Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot Patch queue for rpi - 2018-05-24 Some minor fixes for the Raspberry Pi: - Fix SD writes on new sdhost controller - Sanitize default load addresses, allowing for better payload placement
This commit is contained in:
Tom Rini
commit
7049f62000
2 changed files with 85 additions and 245 deletions
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@ -163,7 +163,6 @@ struct bcm2835_host {
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int clock; /* Current clock speed */
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unsigned int max_clk; /* Max possible freq */
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unsigned int blocks; /* remaining PIO blocks */
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int irq; /* Device IRQ */
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u32 ns_per_fifo_word;
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@ -173,14 +172,7 @@ struct bcm2835_host {
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struct mmc_cmd *cmd; /* Current command */
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struct mmc_data *data; /* Current data request */
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bool data_complete:1;/* Data finished before cmd */
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bool use_busy:1; /* Wait for busy interrupt */
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bool wait_data_complete:1; /* Wait for data */
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/* for threaded irq handler */
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bool irq_block;
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bool irq_busy;
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bool irq_data;
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struct udevice *dev;
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struct mmc *mmc;
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@ -240,17 +232,9 @@ static void bcm2835_reset_internal(struct bcm2835_host *host)
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writel(host->cdiv, host->ioaddr + SDCDIV);
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}
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static int bcm2835_finish_command(struct bcm2835_host *host);
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static void bcm2835_wait_transfer_complete(struct bcm2835_host *host)
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static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
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{
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int timediff;
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u32 alternate_idle;
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alternate_idle = (host->data->flags & MMC_DATA_READ) ?
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SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1;
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timediff = 0;
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int timediff = 0;
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while (1) {
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u32 edm, fsm;
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@ -261,7 +245,10 @@ static void bcm2835_wait_transfer_complete(struct bcm2835_host *host)
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if ((fsm == SDEDM_FSM_IDENTMODE) ||
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(fsm == SDEDM_FSM_DATAMODE))
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break;
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if (fsm == alternate_idle) {
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if ((fsm == SDEDM_FSM_READWAIT) ||
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(fsm == SDEDM_FSM_WRITESTART1) ||
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(fsm == SDEDM_FSM_READDATA)) {
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writel(edm | SDEDM_FORCE_DATA_MODE,
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host->ioaddr + SDEDM);
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break;
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@ -273,9 +260,11 @@ static void bcm2835_wait_transfer_complete(struct bcm2835_host *host)
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"wait_transfer_complete - still waiting after %d retries\n",
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timediff);
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bcm2835_dumpregs(host);
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return;
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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static int bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read)
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@ -322,6 +311,9 @@ static int bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read)
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fsm_state != SDEDM_FSM_READCRC)) ||
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(!is_read &&
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(fsm_state != SDEDM_FSM_WRITEDATA &&
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fsm_state != SDEDM_FSM_WRITEWAIT1 &&
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fsm_state != SDEDM_FSM_WRITEWAIT2 &&
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fsm_state != SDEDM_FSM_WRITECRC &&
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fsm_state != SDEDM_FSM_WRITESTART1 &&
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fsm_state != SDEDM_FSM_WRITESTART2))) {
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hsts = readl(host->ioaddr + SDHSTS);
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@ -358,9 +350,8 @@ static int bcm2835_transfer_pio(struct bcm2835_host *host)
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is_read = (host->data->flags & MMC_DATA_READ) != 0;
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ret = bcm2835_transfer_block_pio(host, is_read);
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if (host->wait_data_complete)
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bcm2835_wait_transfer_complete(host);
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if (ret)
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return ret;
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sdhsts = readl(host->ioaddr + SDHSTS);
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if (sdhsts & (SDHSTS_CRC16_ERROR |
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@ -379,20 +370,7 @@ static int bcm2835_transfer_pio(struct bcm2835_host *host)
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return ret;
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}
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static void bcm2835_set_transfer_irqs(struct bcm2835_host *host)
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{
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u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN |
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SDHCFG_BUSY_IRPT_EN;
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host->hcfg = (host->hcfg & ~all_irqs) |
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SDHCFG_DATA_IRPT_EN |
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SDHCFG_BUSY_IRPT_EN;
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writel(host->hcfg, host->ioaddr + SDHCFG);
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}
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static
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void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd,
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static void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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WARN_ON(host->data);
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@ -401,14 +379,9 @@ void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd,
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if (!data)
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return;
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host->wait_data_complete = cmd->cmdidx != MMC_CMD_READ_MULTIPLE_BLOCK;
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host->data_complete = false;
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/* Use PIO */
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host->blocks = data->blocks;
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bcm2835_set_transfer_irqs(host);
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writel(data->blocksize, host->ioaddr + SDHBCT);
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writel(data->blocks, host->ioaddr + SDHBLC);
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}
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@ -483,36 +456,6 @@ static int bcm2835_send_command(struct bcm2835_host *host, struct mmc_cmd *cmd,
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return 0;
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}
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static int bcm2835_transfer_complete(struct bcm2835_host *host)
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{
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int ret = 0;
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WARN_ON(!host->data_complete);
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host->data = NULL;
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return ret;
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}
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static void bcm2835_finish_data(struct bcm2835_host *host)
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{
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host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN);
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writel(host->hcfg, host->ioaddr + SDHCFG);
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host->data_complete = true;
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if (host->cmd) {
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/* Data managed to finish before the
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* command completed. Make sure we do
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* things in the proper order.
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*/
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dev_dbg(dev, "Finished early - HSTS %08x\n",
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readl(host->ioaddr + SDHSTS));
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} else {
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bcm2835_transfer_complete(host);
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}
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}
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static int bcm2835_finish_command(struct bcm2835_host *host)
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{
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struct mmc_cmd *cmd = host->cmd;
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@ -562,8 +505,6 @@ static int bcm2835_finish_command(struct bcm2835_host *host)
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/* Processed actual command. */
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host->cmd = NULL;
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if (host->data && host->data_complete)
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ret = bcm2835_transfer_complete(host);
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return ret;
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}
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@ -608,159 +549,44 @@ static int bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask)
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return ret;
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}
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static void bcm2835_busy_irq(struct bcm2835_host *host)
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{
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if (WARN_ON(!host->cmd)) {
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bcm2835_dumpregs(host);
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return;
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}
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if (WARN_ON(!host->use_busy)) {
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bcm2835_dumpregs(host);
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return;
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}
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host->use_busy = false;
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bcm2835_finish_command(host);
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}
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static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask)
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static int bcm2835_transmit(struct bcm2835_host *host)
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{
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u32 intmask = readl(host->ioaddr + SDHSTS);
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int ret;
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/*
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* There are no dedicated data/space available interrupt
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* status bits, so it is necessary to use the single shared
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* data/space available FIFO status bits. It is therefore not
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* an error to get here when there is no data transfer in
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* progress.
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*/
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if (!host->data)
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return;
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/* Check for errors */
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ret = bcm2835_check_data_error(host, intmask);
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if (ret)
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goto finished;
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return ret;
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if (host->data->flags & MMC_DATA_WRITE) {
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/* Use the block interrupt for writes after the first block */
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host->hcfg &= ~(SDHCFG_DATA_IRPT_EN);
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host->hcfg |= SDHCFG_BLOCK_IRPT_EN;
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writel(host->hcfg, host->ioaddr + SDHCFG);
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bcm2835_transfer_pio(host);
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} else {
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bcm2835_transfer_pio(host);
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ret = bcm2835_check_cmd_error(host, intmask);
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if (ret)
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return ret;
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/* Handle wait for busy end */
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if (host->use_busy && (intmask & SDHSTS_BUSY_IRPT)) {
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writel(SDHSTS_BUSY_IRPT, host->ioaddr + SDHSTS);
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host->use_busy = false;
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bcm2835_finish_command(host);
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}
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/* Handle PIO data transfer */
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if (host->data) {
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ret = bcm2835_transfer_pio(host);
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if (ret)
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return ret;
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host->blocks--;
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if ((host->blocks == 0))
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goto finished;
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}
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return;
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finished:
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host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN);
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writel(host->hcfg, host->ioaddr + SDHCFG);
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}
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static void bcm2835_data_threaded_irq(struct bcm2835_host *host)
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{
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if (!host->data)
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return;
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if ((host->blocks == 0))
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bcm2835_finish_data(host);
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}
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static void bcm2835_block_irq(struct bcm2835_host *host)
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{
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if (WARN_ON(!host->data)) {
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bcm2835_dumpregs(host);
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return;
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}
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WARN_ON(!host->blocks);
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if ((--host->blocks == 0))
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bcm2835_finish_data(host);
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else
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bcm2835_transfer_pio(host);
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}
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static irqreturn_t bcm2835_irq(int irq, void *dev_id)
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{
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irqreturn_t result = IRQ_NONE;
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struct bcm2835_host *host = dev_id;
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u32 intmask;
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intmask = readl(host->ioaddr + SDHSTS);
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writel(SDHSTS_BUSY_IRPT |
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SDHSTS_BLOCK_IRPT |
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SDHSTS_SDIO_IRPT |
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SDHSTS_DATA_FLAG,
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host->ioaddr + SDHSTS);
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if (intmask & SDHSTS_BLOCK_IRPT) {
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bcm2835_check_data_error(host, intmask);
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host->irq_block = true;
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result = IRQ_WAKE_THREAD;
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}
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if (intmask & SDHSTS_BUSY_IRPT) {
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if (!bcm2835_check_cmd_error(host, intmask)) {
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host->irq_busy = true;
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result = IRQ_WAKE_THREAD;
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} else {
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result = IRQ_HANDLED;
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if (host->blocks == 0) {
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/* Wait for command to complete for real */
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ret = bcm2835_wait_transfer_complete(host);
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if (ret)
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return ret;
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/* Transfer complete */
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host->data = NULL;
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}
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}
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/* There is no true data interrupt status bit, so it is
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* necessary to qualify the data flag with the interrupt
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* enable bit.
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*/
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if ((intmask & SDHSTS_DATA_FLAG) &&
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(host->hcfg & SDHCFG_DATA_IRPT_EN)) {
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bcm2835_data_irq(host, intmask);
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host->irq_data = true;
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result = IRQ_WAKE_THREAD;
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}
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return result;
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}
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static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id)
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{
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struct bcm2835_host *host = dev_id;
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|
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if (host->irq_block) {
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host->irq_block = false;
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bcm2835_block_irq(host);
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}
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|
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if (host->irq_busy) {
|
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host->irq_busy = false;
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bcm2835_busy_irq(host);
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}
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|
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if (host->irq_data) {
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host->irq_data = false;
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bcm2835_data_threaded_irq(host);
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}
|
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return IRQ_HANDLED;
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}
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|
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static void bcm2835_irq_poll(struct bcm2835_host *host)
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{
|
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u32 intmask;
|
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|
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while (1) {
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intmask = readl(host->ioaddr + SDHSTS);
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if (intmask & (SDHSTS_BUSY_IRPT | SDHSTS_BLOCK_IRPT |
|
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SDHSTS_SDIO_IRPT | SDHSTS_DATA_FLAG)) {
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bcm2835_irq(0, host);
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bcm2835_threaded_irq(0, host);
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return;
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}
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}
|
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return 0;
|
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}
|
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static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
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|
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@ -864,8 +690,11 @@ static int bcm2835_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
|
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}
|
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|
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/* Wait for completion of busy signal or data transfer */
|
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while (host->use_busy || host->data)
|
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bcm2835_irq_poll(host);
|
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while (host->use_busy || host->data) {
|
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ret = bcm2835_transmit(host);
|
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if (ret)
|
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break;
|
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}
|
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|
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return ret;
|
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}
|
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|
|
|
|||
|
|
@ -95,39 +95,50 @@
|
|||
*
|
||||
* I suspect address 0 is used as the SMP pen on the RPi2, so avoid this.
|
||||
*
|
||||
* fdt_addr_r simply shouldn't overlap anything else. However, the RPi's
|
||||
* binary firmware loads a DT to address 0x100, so we choose this address to
|
||||
* match it. This allows custom boot scripts to pass this DT on to Linux
|
||||
* simply by not over-writing the data at this address. When using U-Boot,
|
||||
* U-Boot (and scripts it executes) typicaly ignore the DT loaded by the FW
|
||||
* and loads its own DT from disk (triggered by boot.scr or extlinux.conf).
|
||||
* Older versions of the boot firmware place the firmware-loaded DTB at 0x100,
|
||||
* newer versions place it in high memory. So prevent U-Boot from doing its own
|
||||
* DTB + initrd relocation so that we won't accidentally relocate the initrd
|
||||
* over the firmware-loaded DTB and generally try to lay out things starting
|
||||
* from the bottom of RAM.
|
||||
*
|
||||
* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
|
||||
* something else. Put it low in memory to avoid conflicts.
|
||||
* kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM,
|
||||
* it must be within the first 128M of RAM in order for the kernel's
|
||||
* CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed
|
||||
* to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The
|
||||
* decompressor also likes to relocate itself to right past the end of the
|
||||
* decompressed kernel, so in total the sum of the compressed and and
|
||||
* decompressed kernel needs to be reserved.
|
||||
*
|
||||
* kernel_addr_r must be within the first 128M of RAM in order for the
|
||||
* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
|
||||
* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
|
||||
* should not overlap that area, or the kernel will have to copy itself
|
||||
* somewhere else before decompression. Similarly, the address of any other
|
||||
* data passed to the kernel shouldn't overlap the start of RAM. Pushing
|
||||
* this up to 16M allows for a sizable kernel to be decompressed below the
|
||||
* compressed load address.
|
||||
* For Aarch64, the kernel image is uncompressed and must be loaded at
|
||||
* text_offset bytes (specified in the header of the Image) into a 2MB
|
||||
* boundary. The 'booti' command relocates the image if necessary. Linux uses
|
||||
* a default text_offset of 0x80000. In summary, loading at 0x80000
|
||||
* satisfies all these constraints and reserving memory up to 0x02400000
|
||||
* permits fairly large (roughly 36M) kernels.
|
||||
*
|
||||
* scriptaddr can be pretty much anywhere that doesn't conflict with something
|
||||
* else. Choosing 32M allows for the compressed kernel to be up to 16M.
|
||||
* scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't
|
||||
* conflict with something else. Reserving 1M for each of them at
|
||||
* 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty.
|
||||
*
|
||||
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
|
||||
* for any boot script to be up to 1M, which is hopefully plenty.
|
||||
* On ARM, both the DTB and any possible initrd must be loaded such that they
|
||||
* fit inside the lowmem mapping in Linux. In practice, this usually means not
|
||||
* more than ~700M away from the start of the kernel image but this number can
|
||||
* be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line
|
||||
* parameter given to the kernel. So reserving memory from low to high
|
||||
* satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for
|
||||
* the DTB leaves rest of the free RAM to the initrd starting at 0x02700000.
|
||||
* Even with the smallest possible CPU-GPU memory split of the CPU getting
|
||||
* only 64M, the remaining 25M starting at 0x02700000 should allow quite
|
||||
* large initrds before they start colliding with U-Boot.
|
||||
*/
|
||||
#define ENV_MEM_LAYOUT_SETTINGS \
|
||||
"fdt_high=ffffffff\0" \
|
||||
"initrd_high=ffffffff\0" \
|
||||
"fdt_addr_r=0x00000100\0" \
|
||||
"pxefile_addr_r=0x00100000\0" \
|
||||
"kernel_addr_r=0x01000000\0" \
|
||||
"scriptaddr=0x02000000\0" \
|
||||
"ramdisk_addr_r=0x02100000\0" \
|
||||
"kernel_addr_r=0x00080000\0" \
|
||||
"scriptaddr=0x02400000\0" \
|
||||
"pxefile_addr_r=0x02500000\0" \
|
||||
"fdt_addr_r=0x02600000\0" \
|
||||
"ramdisk_addr_r=0x02700000\0"
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 0) \
|
||||
|
|
|
|||
Loading…
Reference in a new issue