sunxi: map DRAM part with 3G size

All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
external DRAM, however the size of DRAM part in the MMU translation
table is still 2GiB.

Change the size of DRAM part in MMU table to 3GiB.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Icenowy Zheng 2018-10-25 17:23:05 +08:00 committed by Jagan Teki
parent cff5c13849
commit 7009134c99

View file

@ -52,7 +52,7 @@ static struct mm_region sunxi_mem_map[] = {
/* RAM */ /* RAM */
.virt = 0x40000000UL, .virt = 0x40000000UL,
.phys = 0x40000000UL, .phys = 0x40000000UL,
.size = 0x80000000UL, .size = 0xC0000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE PTE_BLOCK_INNER_SHARE
}, { }, {