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* Patch by Stephen Williams, 19 March 2004
Increase speed of sector reads from SystemACE, shorten poll timeout and remove a useless reset * Patch by Tolunay Orkun, 19 Mar 2004: Make GigE PHY 1000Mbps Speed/Duplex detection conditional (CONFIG_PHY_GIGE) * Patch by Brad Kemp, 18 Mar 2004: prevent machine checks during a PCI scan * Patch by Pierre Aubert, 18 Mar 2004: Fix string cleaning in IDE identification
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7 changed files with 23 additions and 7 deletions
14
CHANGELOG
14
CHANGELOG
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@ -2,6 +2,20 @@
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Changes for U-Boot 1.0.2:
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======================================================================
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* Patch by Stephen Williams, 19 March 2004
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Increase speed of sector reads from SystemACE,
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shorten poll timeout and remove a useless reset
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* Patch by Tolunay Orkun, 19 Mar 2004:
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Make GigE PHY 1000Mbps Speed/Duplex detection conditional
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(CONFIG_PHY_GIGE)
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* Patch by Brad Kemp, 18 Mar 2004:
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prevent machine checks during a PCI scan
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* Patch by Pierre Aubert, 18 Mar 2004:
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Fix string cleaning in IDE identification
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* Patch by Pierre Aubert, 18 Mar 2004:
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- Unify video mode handling for Chips & Technologies 69000 Video
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chip and Silicon Motion SMI 712/710/810 Video chip
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@ -190,16 +190,13 @@ static unsigned long systemace_read(int dev,
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/* Write sector count | ReadMemCardData. */
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ace_writew((trans&0xff) | 0x0300, 0x14);
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/* CONTROLREG = CFGRESET|LOCKREQ */
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ace_writew(0x0082, 0x18);
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retry = trans * 16;
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while (retry > 0) {
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int idx;
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/* Wait for buffer to become ready. */
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while (! (ace_readw(0x04) & 0x0020)) {
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udelay(1000);
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udelay(100);
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}
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/* Read 16 words of 2bytes from the sector buffer. */
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@ -1417,7 +1417,7 @@ static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
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unsigned char *end, *last;
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last = dst;
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end = src + len;
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end = src + len - 1;
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/* reserve space for '\0' */
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if (len < 2)
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@ -135,6 +135,7 @@ int miiphy_speed (unsigned char addr)
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{
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unsigned short reg;
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#if defined(CONFIG_PHY_GIGE)
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if (miiphy_read (addr, PHY_1000BTSR, ®)) {
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printf ("PHY 1000BT Status read failed\n");
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} else {
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@ -144,6 +145,7 @@ int miiphy_speed (unsigned char addr)
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}
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}
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}
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#endif /* CONFIG_PHY_GIGE */
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if (miiphy_read (addr, PHY_ANLPAR, ®)) {
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puts ("PHY speed1 read failed, assuming 10bT\n");
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@ -165,7 +167,7 @@ int miiphy_duplex (unsigned char addr)
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{
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unsigned short reg;
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#if defined(CONFIG_PHY_GIGE)
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if (miiphy_read (addr, PHY_1000BTSR, ®)) {
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printf ("PHY 1000BT Status read failed\n");
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} else {
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@ -178,6 +180,7 @@ int miiphy_duplex (unsigned char addr)
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}
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}
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}
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#endif /* CONFIG_PHY_GIGE */
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if (miiphy_read (addr, PHY_ANLPAR, ®)) {
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puts ("PHY duplex read failed, assuming half duplex\n");
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@ -140,7 +140,7 @@ MachineCheckException(struct pt_regs *regs)
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dump_pci();
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#endif
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/* clear the error in the error status register */
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if(immap->im_pci.pci_esr && cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) {
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if(immap->im_pci.pci_esr & cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) {
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immap->im_pci.pci_esr = cpu_to_le32(PCI_ERROR_PCI_NO_RSP);
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return;
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}
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@ -150,6 +150,7 @@
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#define CONFIG_PHY2_ADDR 0x10
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#define CONFIG_PHY3_ADDR 0x18
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#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
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#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 10.1.2.3
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#define CONFIG_ETHADDR 00:04:AC:E3:28:8A
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@ -174,6 +174,7 @@ extern void out32(unsigned int, unsigned long);
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#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
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#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
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#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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