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mmc: fsl_esdhc: Add emmc hs200 support
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a. This increases eMMC performance. Tuning procedure is currently not supported. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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23da111d5f
commit
6f883e501b
2 changed files with 23 additions and 15 deletions
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@ -395,10 +395,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
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esdhc_write32(®s->cmdarg, cmd->cmdarg);
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esdhc_write32(®s->xfertyp, xfertyp);
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if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) ||
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(cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200))
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flags = IRQSTAT_BRR;
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/* Wait for the command to complete */
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start = get_timer(0);
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while (!(esdhc_read32(®s->irqstat) & flags)) {
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@ -458,12 +454,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
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#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
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esdhc_pio_read_write(priv, data);
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#else
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flags = DATA_COMPLETE;
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if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) ||
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(cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) {
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flags = IRQSTAT_BRR;
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}
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do {
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irqstat = esdhc_read32(®s->irqstat);
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@ -476,7 +466,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
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err = -ECOMM;
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goto out;
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}
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} while ((irqstat & flags) != flags);
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} while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
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/*
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* Need invalidate the dcache here again to avoid any
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@ -517,7 +507,9 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
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int div = 1;
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int pre_div = 2;
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int ddr_pre_div = mmc->ddr_mode ? 2 : 1;
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int sdhc_clk = priv->sdhc_clk;
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unsigned int sdhc_clk = priv->sdhc_clk;
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u32 time_out;
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u32 value;
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uint clk;
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if (clock < mmc->cfg->f_min)
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@ -538,11 +530,18 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
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esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
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udelay(10000);
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time_out = 20;
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value = PRSSTAT_SDSTB;
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while (!(esdhc_read32(®s->prsstat) & value)) {
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if (time_out == 0) {
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printf("fsl_esdhc: Internal clock never stabilised.\n");
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break;
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}
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time_out--;
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mdelay(1);
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}
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
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priv->clock = clock;
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}
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#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
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@ -1024,6 +1023,8 @@ static int fsl_esdhc_probe(struct udevice *dev)
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return ret;
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}
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mmc_of_parse(dev, &plat->cfg);
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mmc = &plat->mmc;
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mmc->cfg = &plat->cfg;
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mmc->dev = dev;
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@ -1081,6 +1082,9 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
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.get_cd = fsl_esdhc_get_cd,
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.send_cmd = fsl_esdhc_send_cmd,
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.set_ios = fsl_esdhc_set_ios,
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#ifdef MMC_SUPPORTS_TUNING
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.execute_tuning = fsl_esdhc_execute_tuning,
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#endif
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};
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#endif
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@ -205,6 +205,10 @@ struct fsl_esdhc_cfg {
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int fsl_esdhc_mmc_init(bd_t *bis);
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int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
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void fdt_fixup_esdhc(void *blob, bd_t *bd);
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#ifdef MMC_SUPPORTS_TUNING
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static inline int fsl_esdhc_execute_tuning(struct udevice *dev,
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uint32_t opcode) {return 0; }
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#endif
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#else
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static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
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static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
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