mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-17 22:49:02 +00:00
ppc: Rename MPC8XXX_INIT_DDR_SUPPORT to MPC8XXX_INIT_DDR
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
de213c71a3
commit
6f004adaf6
75 changed files with 78 additions and 78 deletions
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@ -742,7 +742,7 @@ config SPL_MMC_WRITE
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Enable write access to MMC and SD Cards in SPL
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config SPL_MPC8XXX_INIT_DDR_SUPPORT
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config SPL_MPC8XXX_INIT_DDR
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bool "Support MPC8XXX DDR init"
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help
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Enable support for DDR-SDRAM (double-data-rate synchronous dynamic
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@ -1509,11 +1509,11 @@ config TPL_LIBGENERIC_SUPPORT
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Enable support for generic U-Boot libraries within TPL. See
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SPL_LIBGENERIC_SUPPORT for details.
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config TPL_MPC8XXX_INIT_DDR_SUPPORT
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config TPL_MPC8XXX_INIT_DDR
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bool "Support MPC8XXX DDR init"
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help
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Enable support for DDR-SDRAM on the MPC8XXX family within TPL. See
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SPL_MPC8XXX_INIT_DDR_SUPPORT for details.
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SPL_MPC8XXX_INIT_DDR for details.
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config TPL_MMC
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bool "Support MMC"
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@ -30,7 +30,7 @@ CONFIG_TPL=y
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CONFIG_TPL_DRIVERS_MISC=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -27,7 +27,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -29,7 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -29,7 +29,7 @@ CONFIG_TPL=y
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CONFIG_TPL_DRIVERS_MISC=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -26,7 +26,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -28,7 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -31,7 +31,7 @@ CONFIG_TPL=y
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CONFIG_TPL_DRIVERS_MISC=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -28,7 +28,7 @@ CONFIG_ID_EEPROM=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -30,7 +30,7 @@ CONFIG_ID_EEPROM=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -30,7 +30,7 @@ CONFIG_TPL=y
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CONFIG_TPL_DRIVERS_MISC=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -27,7 +27,7 @@ CONFIG_ID_EEPROM=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -29,7 +29,7 @@ CONFIG_ID_EEPROM=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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@ -29,7 +29,7 @@ CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -27,7 +27,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -29,7 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -26,7 +26,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -26,7 +26,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -29,7 +29,7 @@ CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -27,7 +27,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -29,7 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_ENV_SUPPORT=y
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CONFIG_TPL_I2C=y
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CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_TPL_MPC8XXX_INIT_DDR=y
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CONFIG_TPL_NAND_SUPPORT=y
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CONFIG_TPL_SERIAL=y
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CONFIG_HUSH_PARSER=y
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@ -26,7 +26,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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@ -34,7 +34,7 @@ CONFIG_SPL_NAND_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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@ -34,7 +34,7 @@ CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -36,7 +36,7 @@ CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -30,7 +30,7 @@ CONFIG_SPL_NAND_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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@ -30,7 +30,7 @@ CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -32,7 +32,7 @@ CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -28,7 +28,7 @@ CONFIG_SPL_NAND_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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@ -28,7 +28,7 @@ CONFIG_SPL_MMC_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -30,7 +30,7 @@ CONFIG_SPL_SPI_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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@ -29,7 +29,7 @@ CONFIG_SPL_NAND_BOOT=y
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CONFIG_SPL_FSL_PBL=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -29,7 +29,7 @@ CONFIG_SPL_MMC_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -31,7 +31,7 @@ CONFIG_SPL_SPI_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -30,7 +30,7 @@ CONFIG_SPL_NAND_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -30,7 +30,7 @@ CONFIG_SPL_MMC_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -32,7 +32,7 @@ CONFIG_SPL_SPI_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -27,7 +27,7 @@ CONFIG_SPL_MMC_BOOT=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -33,7 +33,7 @@ CONFIG_BOARD_LATE_INIT=y
|
|||
CONFIG_PCI_INIT_R=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000
|
||||
CONFIG_CMD_ASKENV=y
|
||||
|
|
|
@ -25,7 +25,7 @@ CONFIG_ID_EEPROM=y
|
|||
CONFIG_SPL_FSL_PBL=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
|
|
|
@ -35,7 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
||||
|
|
|
@ -45,7 +45,7 @@ CONFIG_SPL_CRYPTO=y
|
|||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -44,7 +44,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -44,7 +44,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
|
|
|
@ -40,7 +40,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -33,7 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
|||
CONFIG_SPL_CRYPTO=y
|
||||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -33,7 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
|||
CONFIG_SPL_CRYPTO=y
|
||||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_SPL=y
|
||||
|
|
|
@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_SPL=y
|
||||
|
|
|
@ -35,7 +35,7 @@ CONFIG_SPL_FSL_PBL=y
|
|||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -39,7 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_DM=y
|
||||
|
|
|
@ -38,7 +38,7 @@ CONFIG_MISC_INIT_R=y
|
|||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NOR_SUPPORT=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
CONFIG_SYS_OS_BASE=0x40980000
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_SPL_CRYPTO=y
|
|||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_DM=y
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_DM=y
|
||||
|
|
|
@ -31,7 +31,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
|
|
|
@ -35,7 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_SPL_CRYPTO=y
|
|||
CONFIG_SPL_HASH_SUPPORT=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
|
|
|
@ -36,7 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
|
|
|
@ -26,7 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
|
|||
# CONFIG_USE_BOOTCOMMAND is not set
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_CMD_EEPROM=y
|
||||
|
|
|
@ -29,7 +29,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
||||
CONFIG_CMD_I2C=y
|
||||
|
|
|
@ -27,7 +27,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
|
|||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
|
||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_CMD_IMLS=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
|
|
|
@ -39,7 +39,7 @@ ifdef CONFIG_SPL_BUILD
|
|||
obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/
|
||||
obj-$(CONFIG_SPL_CPU) += cpu/
|
||||
obj-$(CONFIG_SPL_CRYPTO) += crypto/
|
||||
obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
|
||||
obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR) += ddr/fsl/
|
||||
obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
|
||||
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
|
||||
obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
|
||||
|
@ -70,7 +70,7 @@ endif
|
|||
ifdef CONFIG_TPL_BUILD
|
||||
|
||||
obj-$(CONFIG_TPL_BOOTCOUNT_LIMIT) += bootcount/
|
||||
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
|
||||
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR) += ddr/fsl/
|
||||
|
||||
endif
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue