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arm, at91: add icache support
add at least icache support for at91 based boards. This speeds up NOR flash access on an at91sam9g15 based board from 15.2 seconds reading 8 MiB from a SPI NOR flash to 5.7 seconds. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
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parent
806a5a3958
commit
6ed67659b9
3 changed files with 30 additions and 6 deletions
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@ -18,6 +18,7 @@ obj-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o
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obj-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
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obj-$(CONFIG_AT91_EFLASH) += eflash.o
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obj-$(CONFIG_AT91_LED) += led.o
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obj-y += cache.o
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obj-y += clock.o
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obj-y += cpu.o
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obj-y += reset.o
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29
arch/arm/mach-at91/arm926ejs/cache.c
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29
arch/arm/mach-at91/arm926ejs/cache.c
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@ -0,0 +1,29 @@
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/*
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* (C) Copyright 2016
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/types.h>
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#include <common.h>
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void enable_caches(void)
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{
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#ifndef CONFIG_SYS_ICACHE_OFF
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icache_enable();
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#endif
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}
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#ifndef CONFIG_SYS_ICACHE_OFF
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/* Invalidate entire I-cache and branch predictor array */
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void invalidate_icache_all(void)
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{
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unsigned long i = 0;
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asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
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}
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#else
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void invalidate_icache_all(void)
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{
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}
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#endif
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@ -414,12 +414,6 @@ void reset_phy(void)
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{
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}
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/* This breaks the Ethernet MAC at present */
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void enable_caches(void)
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{
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dcache_enable();
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}
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/* SPI chip select control - only used for FPGA programming */
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#ifdef CONFIG_ATMEL_SPI
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