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ARM: zynq: slcr: Fix incorrect commentary

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Fix c&p error in zynq_slcr_devcfg_enable() commentary
and extending it with description according
to Zynq TRM also in zynq_slcr_devcfg_disable().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2014-03-27 10:06:43 +01:00
parent 1540fb725b
commit 6e04769caf
1 changed files with 2 additions and 2 deletions
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4
arch/arm/cpu/armv7/zynq/slcr.c
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@ -83,7 +83,7 @@ void zynq_slcr_devcfg_disable(void)
{
zynq_slcr_unlock();
/* Disable AXI interface */
/* Disable AXI interface by asserting FPGA resets */
writel(0xFFFFFFFF, &slcr_base->fpga_rst_ctrl);
/* Set Level Shifters DT618760 */
@ -99,7 +99,7 @@ void zynq_slcr_devcfg_enable(void)
/* Set Level Shifters DT618760 */
writel(0xF, &slcr_base->lvl_shftr_en);
/* Disable AXI interface */
/* Enable AXI interface by de-asserting FPGA resets */
writel(0x0, &slcr_base->fpga_rst_ctrl);
zynq_slcr_lock();