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https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
Update code for TQM8540 board (and 85xx in general):
- Change the name of the Ethernet driver: MOTO ENET -> ENET - Reformat boot messages - Enable redundant environment - Replace the -O2 optimization flag with -mno-string
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7 changed files with 39 additions and 36 deletions
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@ -2,6 +2,12 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* Update code for TQM8540 board (and 85xx in general):
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- Change the name of the Ethernet driver: MOTO ENET -> ENET
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- Reformat boot messages
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- Enable redundant environment
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- Replace the -O2 optimization flag with -mno-string
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* Patch by David Brownell, 10 Mar 2005:
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Restore copyright statements in OHCI drivers.
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@ -52,10 +52,10 @@ int checkboard (void)
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puts ("Board: TQM8540\n");
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#ifdef CONFIG_PCI
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printf (" PCI1: 32 bit, %d MHz (compiled)\n",
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printf ("PCI1: 32 bit, %d MHz (compiled)\n",
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CONFIG_SYS_CLK_FREQ / 1000000);
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#else
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printf (" PCI1: disabled\n");
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printf ("PCI1: disabled\n");
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#endif
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/*
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* Initialize local bus.
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@ -72,8 +72,6 @@ long int initdram (int board_type)
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extern long spd_sdram (void);
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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puts ("Initializing\n");
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#if defined(CONFIG_DDR_DLL)
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{
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volatile ccsr_gur_t *gur = &immap->im_gur;
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@ -101,7 +99,6 @@ long int initdram (int board_type)
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ddr_enable_ecc (dram_size);
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#endif
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puts (" DDR: ");
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return dram_size;
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}
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@ -23,4 +23,4 @@
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PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
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PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx -DCONFIG_E500 -ffixed-r2 -ffixed-r29 -Wa,-me500 -msoft-float -O2
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PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx -DCONFIG_E500 -ffixed-r2 -ffixed-r29 -Wa,-me500 -msoft-float -mno-string
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@ -41,30 +41,12 @@ int checkcpu (void)
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uint ver;
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uint major, minor;
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puts("Freescale PowerPC\n");
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pvr = get_pvr();
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ver = PVR_VER(pvr);
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major = PVR_MAJ(pvr);
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minor = PVR_MIN(pvr);
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printf(" Core: ");
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switch (ver) {
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case PVR_VER(PVR_85xx):
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puts("E500");
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break;
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default:
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puts("Unknown");
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break;
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}
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
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svr = get_svr();
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ver = SVR_VER(svr);
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major = SVR_MAJ(svr);
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minor = SVR_MIN(svr);
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puts(" System: ");
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puts("CPU: ");
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switch (ver) {
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case SVR_8540:
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puts("8540");
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@ -84,12 +66,28 @@ int checkcpu (void)
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}
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
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pvr = get_pvr();
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ver = PVR_VER(pvr);
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major = PVR_MAJ(pvr);
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minor = PVR_MIN(pvr);
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printf("Core: ");
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switch (ver) {
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case PVR_VER(PVR_85xx):
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puts("E500");
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break;
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default:
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puts("Unknown");
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break;
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}
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
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get_sys_info(&sysinfo);
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puts(" Clocks: ");
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printf("CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000);
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printf("CCB:%4lu MHz, ", sysinfo.freqSystemBus / 1000000);
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printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);
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puts("Clocks Configuration:\n");
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printf(" CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000);
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printf("CCB:%4lu MHz,\n", sysinfo.freqSystemBus / 1000000);
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printf(" DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);
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#if defined(CFG_LBC_LCRR)
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lcrr = CFG_LBC_LCRR;
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@ -106,15 +104,15 @@ int checkcpu (void)
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printf("LBC:%4lu MHz\n",
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sysinfo.freqSystemBus / 1000000 / clkdiv);
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} else {
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printf(" LBC: unknown (lcrr: 0x%08x)\n", lcrr);
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printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr);
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}
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if (ver == SVR_8560) {
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printf(" CPM: %lu Mhz\n",
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printf("CPM: %lu Mhz\n",
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sysinfo.freqSystemBus / 1000000);
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}
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puts(" L1 D-cache 32KB, L1 I-cache 32KB enabled.\n");
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puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n");
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return 0;
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}
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@ -196,9 +196,9 @@ int cpu_init_r (void)
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temp = l2cache->l2ctl;
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asm("msync;isync");
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printf("L2 cache enabled: 256KB\n");
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printf("L2: 256 kB enabled\n");
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#else
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printf("L2 cache disabled.\n");
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printf("L2: disabled.\n");
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#endif
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return 0;
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@ -141,7 +141,7 @@ int tsec_initialize(bd_t *bis, int index)
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priv->phyaddr = tsec_info[index].phyaddr;
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priv->gigabit = tsec_info[index].gigabit;
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sprintf(dev->name, "MOTO ENET%d", index);
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sprintf(dev->name, "ENET%d", index);
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dev->iobase = 0;
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dev->priv = priv;
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dev->init = tsec_init;
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@ -297,7 +297,7 @@
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#define FEC_PHY_ADDR 0
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#define FEC_PHYIDX 0
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#define CONFIG_ETHPRIME "MOTO ENET2"
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#define CONFIG_ETHPRIME "ENET1"
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#endif /* CONFIG_TSEC_ENET */
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@ -310,6 +310,8 @@
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#define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x20000)
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#define CFG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
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#define CFG_ENV_SIZE 0x2000
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#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET-CFG_ENV_SECT_SIZE)
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
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#else
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#define CFG_NO_FLASH 1 /* Flash is not usable now */
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#define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
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