mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 08:59:33 +00:00
ARM: remove broken "SMN42" board.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
This commit is contained in:
Wolfgang Denk
parent
8b075814fd
commit
6aac646f58
9 changed files with 1 additions and 939 deletions
1
MAKEALL
1
MAKEALL
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@ -306,7 +306,6 @@ LIST_ARM7=" \
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impa7 \
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impa7 \
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lpc2292sodimm \
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lpc2292sodimm \
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modnet50 \
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modnet50 \
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SMN42 \
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"
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"
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#########################################################################
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#########################################################################
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@ -1,51 +0,0 @@
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#
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# (C) Copyright 2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := flash.o smn42.o
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SOBJTS := lowlevel_init.o
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SRCS := $(SOBJTS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJTS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,30 +0,0 @@
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#
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# (C) Copyright 2000
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# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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# Marius Groeger <mgroeger@sysgo.de>
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#address where u-boot will be relocated
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#CONFIG_SYS_TEXT_BASE = 0x0
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CONFIG_SYS_TEXT_BASE = 0x81500000
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@ -1,475 +0,0 @@
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/*
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* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
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*
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* (C) Copyright 2007 Gary Jennejohn garyj@denx.de
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* Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c.
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* Heavily modified to support the SMN42 board from Siemens
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/byteorder.h>
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#include <asm/arch/hardware.h>
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static unsigned long flash_addr_table[CONFIG_SYS_MAX_FLASH_BANKS] = CONFIG_SYS_FLASH_BANKS_LIST;
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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extern int lpc2292_copy_buffer_to_flash(flash_info_t *, ulong);
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extern int lpc2292_flash_erase(flash_info_t *, int, int);
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extern int lpc2292_write_buff (flash_info_t *, uchar *, ulong, ulong);
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static unsigned long ext_flash_init(void);
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static int ext_flash_erase(flash_info_t *, int, int);
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static int ext_write_buff(flash_info_t *, uchar *, ulong, ulong);
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/*-----------------------------------------------------------------------
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*/
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ulong flash_init (void)
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{
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int j, k;
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ulong size = 0;
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ulong flashbase = 0;
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flash_info[0].flash_id = PHILIPS_LPC2292;
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flash_info[0].size = 0x003E000; /* 256 - 8 KB */
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flash_info[0].sector_count = 17;
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memset (flash_info[0].protect, 0, 17);
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flashbase = 0x00000000;
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for (j = 0, k = 0; j < 8; j++, k++) {
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flash_info[0].start[k] = flashbase;
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flashbase += 0x00002000;
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}
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for (j = 0; j < 2; j++, k++) {
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flash_info[0].start[k] = flashbase;
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flashbase += 0x00010000;
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}
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for (j = 0; j < 7; j++, k++) {
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flash_info[0].start[k] = flashbase;
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flashbase += 0x00002000;
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}
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size += flash_info[0].size;
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/* Protect monitor and environment sectors */
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flash_protect (FLAG_PROTECT_SET,
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0x0,
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0x0 + monitor_flash_len - 1,
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&flash_info[0]);
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
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&flash_info[0]);
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size += ext_flash_init();
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t * info)
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{
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int i;
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int erased = 0;
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unsigned long j;
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unsigned long count;
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unsigned char *p;
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switch (info->flash_id & FLASH_VENDMASK) {
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case (PHILIPS_LPC2292 & FLASH_VENDMASK):
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printf("Philips: ");
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break;
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case FLASH_MAN_AMD:
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printf("AMD: ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
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printf("LPC2292 internal flash\n");
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break;
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case FLASH_S29GL128N:
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printf ("S29GL128N (128 Mbit, uniform sector size)\n");
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break;
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default:
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printf("Unknown Chip Type\n");
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return;
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}
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printf (" Size: %ld KB in %d Sectors\n",
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info->size >> 10, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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if (i < (info->sector_count - 1)) {
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count = info->start[i+1] - info->start[i];
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}
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else {
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count = info->start[0] + info->size - info->start[i];
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}
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p = (unsigned char*)(info->start[i]);
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erased = 1;
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for (j = 0; j < count; j++) {
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if (*p != 0xFF) {
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erased = 0;
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break;
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}
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p++;
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}
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printf (" %08lX%s%s", info->start[i], info->protect[i] ? " RO" : " ",
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erased ? " E" : " ");
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}
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printf ("\n");
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}
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
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return lpc2292_flash_erase(info, s_first, s_last);
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case FLASH_S29GL128N:
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return ext_flash_erase(info, s_first, s_last);
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default:
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return ERR_PROTECTED;
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}
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return ERR_PROTECTED;
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}
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
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return lpc2292_write_buff(info, src, addr, cnt);
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case FLASH_S29GL128N:
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return ext_write_buff(info, src, addr, cnt);
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default:
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return ERR_PROG_ERROR;
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}
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return ERR_PROG_ERROR;
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}
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/*--------------------------------------------------------------------------
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* From here on is code for the external S29GL128N taken from cam5200_flash.c
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*/
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#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
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static int wait_for_DQ7_32(flash_info_t * info, int sect)
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{
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ulong start, now, last;
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
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(CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
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start = get_timer(0);
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last = start;
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while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
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(CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
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if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf("Timeout\n");
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return -1;
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}
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc('.');
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last = now;
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}
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}
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return 0;
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}
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int ext_flash_erase(flash_info_t * info, int s_first, int s_last)
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{
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
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int flag, prot, sect, l_sect, ret;
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ret = 0;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN)
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printf("- missing\n");
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else
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printf("- no sectors to erase\n");
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return 1;
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}
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if (info->flash_id == FLASH_UNKNOWN) {
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printf("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect])
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prot++;
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}
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if (prot)
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printf("- Warning: %d protected sectors will not be erased!", prot);
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printf("\n");
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
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addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
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l_sect = sect;
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/*
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* Wait for each sector to complete, it's more
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* reliable. According to AMD Spec, you must
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* issue all erase commands within a specified
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* timeout. This has been seen to fail, especially
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* if printf()s are included (for debug)!!
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*/
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ret = wait_for_DQ7_32(info, sect);
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if (ret) {
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ret = ERR_PROTECTED;
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break;
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}
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}
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}
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||||||
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* wait at least 80us - let's wait 1 ms */
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udelay(1000);
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/* reset to read mode */
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addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
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addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
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if (ret)
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printf(" error\n");
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else
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printf(" done\n");
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return ret;
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|
||||||
}
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static ulong flash_get_size(vu_long * addr, flash_info_t * info)
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|
||||||
{
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short i;
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CONFIG_SYS_FLASH_WORD_SIZE value;
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||||||
ulong base = (ulong) addr;
|
|
||||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
|
|
||||||
|
|
||||||
/* Write auto select command: read Manufacturer ID */
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
|
|
||||||
udelay(1000);
|
|
||||||
|
|
||||||
value = addr2[0];
|
|
||||||
|
|
||||||
switch (value) {
|
|
||||||
case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
|
|
||||||
info->flash_id = FLASH_MAN_AMD;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
info->flash_id = FLASH_UNKNOWN;
|
|
||||||
info->sector_count = 0;
|
|
||||||
info->size = 0;
|
|
||||||
return (0); /* no or unknown flash */
|
|
||||||
}
|
|
||||||
|
|
||||||
value = addr2[1]; /* device ID */
|
|
||||||
|
|
||||||
switch (value) {
|
|
||||||
case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_MIRROR:
|
|
||||||
value = addr2[14];
|
|
||||||
switch(value) {
|
|
||||||
case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_2:
|
|
||||||
value = addr2[15];
|
|
||||||
if (value != (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_3) {
|
|
||||||
info->flash_id = FLASH_UNKNOWN;
|
|
||||||
} else {
|
|
||||||
info->flash_id += FLASH_S29GL128N;
|
|
||||||
info->sector_count = 128;
|
|
||||||
info->size = 0x01000000;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
info->flash_id = FLASH_UNKNOWN;
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
info->flash_id = FLASH_UNKNOWN;
|
|
||||||
return (0); /* => no or unknown flash */
|
|
||||||
}
|
|
||||||
|
|
||||||
/* set up sector start address table */
|
|
||||||
for (i = 0; i < info->sector_count; i++)
|
|
||||||
info->start[i] = base + (i * 0x00020000);
|
|
||||||
|
|
||||||
/* check for protected sectors */
|
|
||||||
for (i = 0; i < info->sector_count; i++) {
|
|
||||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
|
|
||||||
/* D0 = 1 if protected */
|
|
||||||
addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
|
|
||||||
|
|
||||||
info->protect[i] = addr2[2] & 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* issue bank reset to return to read mode */
|
|
||||||
addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
|
|
||||||
|
|
||||||
return (info->size);
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned long ext_flash_init(void)
|
|
||||||
{
|
|
||||||
unsigned long total_b = 0;
|
|
||||||
unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS];
|
|
||||||
int i;
|
|
||||||
|
|
||||||
/* Init: no FLASHes known */
|
|
||||||
for (i = 1; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
|
|
||||||
flash_info[i].flash_id = FLASH_UNKNOWN;
|
|
||||||
flash_info[i].sector_count = -1;
|
|
||||||
flash_info[i].size = 0;
|
|
||||||
|
|
||||||
/* call flash_get_size() to initialize sector address */
|
|
||||||
size_b[i] = flash_get_size((vu_long *) flash_addr_table[i],
|
|
||||||
&flash_info[i]);
|
|
||||||
|
|
||||||
flash_info[i].size = size_b[i];
|
|
||||||
|
|
||||||
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
|
|
||||||
printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
|
|
||||||
i+1, size_b[i], size_b[i] << 20);
|
|
||||||
flash_info[i].sector_count = -1;
|
|
||||||
flash_info[i].size = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
total_b += flash_info[i].size;
|
|
||||||
}
|
|
||||||
|
|
||||||
return total_b;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int write_word(flash_info_t * info, ulong dest, ushort data)
|
|
||||||
{
|
|
||||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
|
|
||||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
|
|
||||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) &data;
|
|
||||||
ulong start;
|
|
||||||
int flag;
|
|
||||||
|
|
||||||
/* Check if Flash is (sufficiently) erased */
|
|
||||||
if ((*dest2 & *data2) != *data2) {
|
|
||||||
return (2);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Disable interrupts which might cause a timeout here */
|
|
||||||
flag = disable_interrupts();
|
|
||||||
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
|
|
||||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
|
|
||||||
*dest2 = *data2;
|
|
||||||
|
|
||||||
/* re-enable interrupts if necessary */
|
|
||||||
if (flag)
|
|
||||||
enable_interrupts();
|
|
||||||
|
|
||||||
/* data polling for D7 */
|
|
||||||
start = get_timer(0);
|
|
||||||
while ((*dest2 & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
|
|
||||||
(*data2 & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
|
|
||||||
|
|
||||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
|
||||||
printf("WRITE_TOUT\n");
|
|
||||||
return (1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* This is taken from the original flash.c for the LPC2292 SODIMM board
|
|
||||||
* and modified to suit.
|
|
||||||
*/
|
|
||||||
|
|
||||||
int ext_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
|
||||||
{
|
|
||||||
ushort tmp;
|
|
||||||
ulong i;
|
|
||||||
uchar* src_org;
|
|
||||||
uchar* dst_org;
|
|
||||||
ulong cnt_org = cnt;
|
|
||||||
int ret = ERR_OK;
|
|
||||||
|
|
||||||
src_org = src;
|
|
||||||
dst_org = (uchar*)addr;
|
|
||||||
|
|
||||||
if (addr & 1) { /* if odd address */
|
|
||||||
tmp = *((uchar*)(addr - 1)); /* little endian */
|
|
||||||
tmp |= (*src << 8);
|
|
||||||
if (write_word(info, addr - 1, tmp))
|
|
||||||
return ERR_PROG_ERROR;
|
|
||||||
addr += 1;
|
|
||||||
cnt -= 1;
|
|
||||||
src++;
|
|
||||||
}
|
|
||||||
while (cnt > 1) {
|
|
||||||
tmp = ((*(src+1)) << 8) + (*src); /* little endian */
|
|
||||||
if (write_word(info, addr, tmp))
|
|
||||||
return ERR_PROG_ERROR;
|
|
||||||
addr += 2;
|
|
||||||
src += 2;
|
|
||||||
cnt -= 2;
|
|
||||||
}
|
|
||||||
if (cnt > 0) {
|
|
||||||
tmp = (*((uchar*)(addr + 1))) << 8;
|
|
||||||
tmp |= *src;
|
|
||||||
if (write_word(info, addr, tmp))
|
|
||||||
return ERR_PROG_ERROR;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < cnt_org; i++) {
|
|
||||||
if (*dst_org != *src_org) {
|
|
||||||
printf("Write failed. Byte %lX differs\n", i);
|
|
||||||
ret = ERR_PROG_ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
dst_org++;
|
|
||||||
src_org++;
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
@ -1,123 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
|
|
||||||
*
|
|
||||||
* Slight modifications made to support the SMN42 board from Siemens.
|
|
||||||
* 2007 Gary Jennejohn garyj@denx.de
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <config.h>
|
|
||||||
#include <version.h>
|
|
||||||
#include <asm/arch/hardware.h>
|
|
||||||
|
|
||||||
/* some parameters for the board */
|
|
||||||
/* setting up the CPU-internal memory */
|
|
||||||
#define SRAM_START 0x40000000
|
|
||||||
#define SRAM_SIZE 0x00004000
|
|
||||||
#define BCFG0_VALUE 0x1000ffef
|
|
||||||
#define BCFG1_VALUE 0x10005D2F
|
|
||||||
#define BCFG2_VALUE 0x10005D2F
|
|
||||||
/*
|
|
||||||
* For P0.18 to set ZZ to the SRAMs to 1. Also set P0.2 (SCL) and P0.3 (SDA)
|
|
||||||
* for the bit-banger I2C driver correctly.
|
|
||||||
*/
|
|
||||||
#define IO0_VALUE 0x4000C
|
|
||||||
|
|
||||||
_TEXT_BASE:
|
|
||||||
.word CONFIG_SYS_TEXT_BASE
|
|
||||||
MEMMAP_ADR:
|
|
||||||
.word MEMMAP
|
|
||||||
BCFG0_ADR:
|
|
||||||
.word BCFG0
|
|
||||||
_BCFG0_VALUE:
|
|
||||||
.word BCFG0_VALUE
|
|
||||||
BCFG1_ADR:
|
|
||||||
.word BCFG1
|
|
||||||
_BCFG1_VALUE:
|
|
||||||
.word BCFG1_VALUE
|
|
||||||
BCFG2_ADR:
|
|
||||||
.word BCFG2
|
|
||||||
_BCFG2_VALUE:
|
|
||||||
.word BCFG2_VALUE
|
|
||||||
IO0DIR_ADR:
|
|
||||||
.word IO0DIR
|
|
||||||
_IO0DIR_VALUE:
|
|
||||||
.word IO0_VALUE
|
|
||||||
IO0SET_ADR:
|
|
||||||
.word IO0SET
|
|
||||||
_IO0SET_VALUE:
|
|
||||||
.word IO0_VALUE
|
|
||||||
PINSEL2_ADR:
|
|
||||||
.word PINSEL2
|
|
||||||
PINSEL2_MASK:
|
|
||||||
.word 0x00000000
|
|
||||||
PINSEL2_VALUE:
|
|
||||||
.word 0x0F804914
|
|
||||||
|
|
||||||
.extern _start
|
|
||||||
|
|
||||||
.globl lowlevel_init
|
|
||||||
lowlevel_init:
|
|
||||||
/* set up memory control register for bank 0 */
|
|
||||||
ldr r0, _BCFG0_VALUE
|
|
||||||
ldr r1, BCFG0_ADR
|
|
||||||
str r0, [r1]
|
|
||||||
|
|
||||||
/* set up memory control register for bank 1 */
|
|
||||||
ldr r0, _BCFG1_VALUE
|
|
||||||
ldr r1, BCFG1_ADR
|
|
||||||
str r0, [r1]
|
|
||||||
|
|
||||||
/* set up memory control register for bank 2 */
|
|
||||||
ldr r0, _BCFG2_VALUE
|
|
||||||
ldr r1, BCFG2_ADR
|
|
||||||
str r0, [r1]
|
|
||||||
|
|
||||||
/* set IO0DIR to make P0.2, P0.3 and P0.18 outputs */
|
|
||||||
ldr r0, _IO0DIR_VALUE
|
|
||||||
ldr r1, IO0DIR_ADR
|
|
||||||
str r0, [r1]
|
|
||||||
|
|
||||||
/* set P0.18 to 1 */
|
|
||||||
ldr r0, _IO0SET_VALUE
|
|
||||||
ldr r1, IO0SET_ADR
|
|
||||||
str r0, [r1]
|
|
||||||
|
|
||||||
/* set up PINSEL2 for bus-pins */
|
|
||||||
ldr r0, PINSEL2_ADR
|
|
||||||
ldr r1, [r0]
|
|
||||||
ldr r2, PINSEL2_MASK
|
|
||||||
ldr r3, PINSEL2_VALUE
|
|
||||||
and r1, r1, r2
|
|
||||||
orr r1, r1, r3
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* move vectors to beginning of SRAM */
|
|
||||||
mov r2, #SRAM_START
|
|
||||||
mov r0, #0 /*_start*/
|
|
||||||
ldmneia r0!, {r3-r10}
|
|
||||||
stmneia r2!, {r3-r10}
|
|
||||||
ldmneia r0, {r3-r9}
|
|
||||||
stmneia r2, {r3-r9}
|
|
||||||
|
|
||||||
/* Set-up MEMMAP register, so vectors are taken from SRAM */
|
|
||||||
ldr r0, MEMMAP_ADR
|
|
||||||
mov r1, #0x02 /* vectors re-mapped to static RAM */
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* everything is fine now */
|
|
||||||
mov pc, lr
|
|
||||||
|
|
@ -1,57 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com>
|
|
||||||
* Armadillo board HT1070
|
|
||||||
*
|
|
||||||
* (C) Copyright 2007 Gary Jennejohn <garyj@denx.de>
|
|
||||||
* Siemens board SMN42
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <clps7111.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous platform dependent initialisations
|
|
||||||
*/
|
|
||||||
|
|
||||||
int board_init (void)
|
|
||||||
{
|
|
||||||
/* arch number MACH_TYPE_ARMADILLO - not official*/
|
|
||||||
gd->bd->bi_arch_number = 83;
|
|
||||||
|
|
||||||
/* location of boot parameters */
|
|
||||||
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x00000100;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int dram_init (void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
@ -47,7 +47,6 @@ impa7 arm arm720t
|
||||||
modnet50 arm arm720t
|
modnet50 arm arm720t
|
||||||
integratorap_cm720t arm arm720t integrator armltd - integratorap
|
integratorap_cm720t arm arm720t integrator armltd - integratorap
|
||||||
lpc2292sodimm arm arm720t - - lpc2292
|
lpc2292sodimm arm arm720t - - lpc2292
|
||||||
SMN42 arm arm720t - siemens lpc2292
|
|
||||||
evb4510 arm arm720t - - s3c4510b
|
evb4510 arm arm720t - - s3c4510b
|
||||||
integratorap_cm920t arm arm920t integrator armltd - integratorap
|
integratorap_cm920t arm arm920t integrator armltd - integratorap
|
||||||
integratorcp_cm920t arm arm920t integrator armltd - integratorcp
|
integratorcp_cm920t arm arm920t integrator armltd - integratorcp
|
||||||
|
|
|
||||||
|
|
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
||||||
|
|
||||||
Board Arch CPU removed Commit last known maintainer/contact
|
Board Arch CPU removed Commit last known maintainer/contact
|
||||||
=============================================================================
|
=============================================================================
|
||||||
|
SMN42 arm arm720t - 2011-09-05
|
||||||
at91rm9200dk arm arm920t 1c85752 2011-07-17
|
at91rm9200dk arm arm920t 1c85752 2011-07-17
|
||||||
m501sk arm arm920t b1a2bd4 2011-07-17
|
m501sk arm arm920t b1a2bd4 2011-07-17
|
||||||
kb9202 arm arm920t 5bd3814 2011-07-17
|
kb9202 arm arm920t 5bd3814 2011-07-17
|
||||||
|
|
|
||||||
|
|
@ -1,201 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2007
|
|
||||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
||||||
*
|
|
||||||
* Configuation settings for the SMN42 board from Siemens.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __CONFIG_H
|
|
||||||
#define __CONFIG_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* If we are developing, we might want to start u-boot from ram
|
|
||||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
|
||||||
*/
|
|
||||||
#undef CONFIG_SKIP_LOWLEVEL_INIT
|
|
||||||
|
|
||||||
/*
|
|
||||||
* High Level Configuration Options
|
|
||||||
* (easy to change)
|
|
||||||
*/
|
|
||||||
#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
|
|
||||||
#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
|
|
||||||
#define CONFIG_LPC2292
|
|
||||||
#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
|
|
||||||
|
|
||||||
#undef CONFIG_USE_IRQ /* don't need them anymore */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Size of malloc() pool
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Hardware drivers
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* select serial console configuration
|
|
||||||
*/
|
|
||||||
#define CONFIG_LPC2292_SERIAL
|
|
||||||
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
|
|
||||||
|
|
||||||
/* allow to overwrite serial and ethaddr */
|
|
||||||
#define CONFIG_ENV_OVERWRITE
|
|
||||||
|
|
||||||
#define CONFIG_BAUDRATE 115200
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options
|
|
||||||
*/
|
|
||||||
#define CONFIG_BOOTP_SUBNETMASK
|
|
||||||
#define CONFIG_BOOTP_GATEWAY
|
|
||||||
#define CONFIG_BOOTP_HOSTNAME
|
|
||||||
#define CONFIG_BOOTP_BOOTPATH
|
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
|
||||||
|
|
||||||
|
|
||||||
/* enable I2C and select the hardware/software driver */
|
|
||||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
|
||||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
|
||||||
/* this would be 0xAE if E0, E1 and E2 were pulled high */
|
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0xA0
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA0 >> 1)
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
|
|
||||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
|
|
||||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
|
|
||||||
/* not used but required by devices.c */
|
|
||||||
#define CONFIG_SYS_I2C_SPEED 10000
|
|
||||||
|
|
||||||
#ifdef CONFIG_SOFT_I2C
|
|
||||||
/*
|
|
||||||
* Software (bit-bang) I2C driver configuration
|
|
||||||
*/
|
|
||||||
#define SCL 0x00000004 /* P0.2 */
|
|
||||||
#define SDA 0x00000008 /* P0.3 */
|
|
||||||
|
|
||||||
#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
|
|
||||||
#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
|
|
||||||
#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
|
|
||||||
#define I2C_DELAY { udelay(100); }
|
|
||||||
#define I2C_ACTIVE { unsigned int i2ctmp; \
|
|
||||||
i2ctmp = GET32(IO0DIR); \
|
|
||||||
i2ctmp |= SDA; \
|
|
||||||
PUT32(IO0DIR, i2ctmp); }
|
|
||||||
#define I2C_TRISTATE { unsigned int i2ctmp; \
|
|
||||||
i2ctmp = GET32(IO0DIR); \
|
|
||||||
i2ctmp &= ~SDA; \
|
|
||||||
PUT32(IO0DIR, i2ctmp); }
|
|
||||||
#endif /* CONFIG_SOFT_I2C */
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration.
|
|
||||||
*/
|
|
||||||
#include <config_cmd_default.h>
|
|
||||||
#define CONFIG_CMD_DHCP
|
|
||||||
#define CONFIG_CMD_FAT
|
|
||||||
#define CONFIG_CMD_MMC
|
|
||||||
#define CONFIG_CMD_NET
|
|
||||||
#define CONFIG_CMD_EEPROM
|
|
||||||
#define CONFIG_CMD_PING
|
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_DOS_PARTITION
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 5
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous configurable options
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
||||||
#define CONFIG_SYS_PROMPT "SMN42 # " /* Monitor Command Prompt */
|
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */
|
|
||||||
#define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
|
|
||||||
/* for uClinux img is here*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */
|
|
||||||
#define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */
|
|
||||||
|
|
||||||
/* valid baudrates */
|
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Stack sizes
|
|
||||||
*
|
|
||||||
* The stack sizes are set up in start.S using the settings below
|
|
||||||
*/
|
|
||||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
|
||||||
#ifdef CONFIG_USE_IRQ
|
|
||||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
|
||||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Physical Memory Map
|
|
||||||
*/
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
|
|
||||||
#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
|
|
||||||
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
|
|
||||||
|
|
||||||
/* This is the external flash */
|
|
||||||
#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
|
|
||||||
#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* FLASH and environment organization
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The first entry in CONFIG_SYS_FLASH_BANKS_LIST is a dummy, but it must be present.
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
|
|
||||||
#define CONFIG_SYS_FLASH_ADDR0 0x555
|
|
||||||
#define CONFIG_SYS_FLASH_ADDR1 0x2AA
|
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
|
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
||||||
/* The Environment Sector is in the CPU-internal flash */
|
|
||||||
#define CONFIG_SYS_FLASH_BASE 0
|
|
||||||
#define CONFIG_ENV_OFFSET 0x3C000
|
|
||||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
|
|
||||||
#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
|
|
||||||
|
|
||||||
#define CONFIG_CMDLINE_TAG
|
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS
|
|
||||||
#define CONFIG_INITRD_TAG
|
|
||||||
#define CONFIG_MMC 1
|
|
||||||
/* we use this ethernet chip */
|
|
||||||
#define CONFIG_ENC28J60_LPC2292
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
||||||
Loading…
Reference in a new issue