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fpga: xilinx: virtex2: Setup NULL fpga_op without driver
Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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1 changed files with 31 additions and 14 deletions
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@ -11,8 +11,6 @@
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#include <xilinx.h>
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extern struct xilinx_fpga_op virtex2_op;
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/*
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* Slave SelectMap Implementation function table.
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*/
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@ -40,6 +38,13 @@ typedef struct {
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xilinx_wdata_fn wdata;
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} xilinx_virtex2_slave_serial_fns;
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#if defined(CONFIG_FPGA_VIRTEX2)
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extern struct xilinx_fpga_op virtex2_op;
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# define FPGA_VIRTEX2_OPS &virtex2_op
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#else
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# define FPGA_VIRTEX2_OPS NULL
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#endif
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/* Device Image Sizes (in bytes)
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*********************************************************************/
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#define XILINX_XC2V40_SIZE (338208 / 8)
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@ -58,39 +63,51 @@ typedef struct {
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/* Descriptor Macros
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*********************************************************************/
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#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
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{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
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{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
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FPGA_VIRTEX2_OPS }
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#endif /* _VIRTEX2_H_ */
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