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MIPS: add support for Broadcom MIPS BCM63268 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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3 changed files with 126 additions and 0 deletions
88
arch/mips/dts/brcm,bcm63268.dtsi
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88
arch/mips/dts/brcm,bcm63268.dtsi
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm63268";
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cpus {
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reg = <0x10000000 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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cpu@1 {
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compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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u-boot,dm-pre-reloc;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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pll_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000008 0x4>;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pll_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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};
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uart0: serial@10000180 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000180 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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uart1: serial@100001a0 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x100001a0 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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memory-controller@10003000 {
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compatible = "brcm,bcm6328-mc";
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reg = <0x10003000 0x1000>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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@ -4,6 +4,7 @@ menu "Broadcom MIPS platforms"
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config SYS_SOC
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config SYS_SOC
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default "bcm6328" if SOC_BMIPS_BCM6328
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default "bcm6328" if SOC_BMIPS_BCM6328
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default "bcm6358" if SOC_BMIPS_BCM6358
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default "bcm6358" if SOC_BMIPS_BCM6358
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default "bcm63268" if SOC_BMIPS_BCM63268
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choice
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choice
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prompt "Broadcom MIPS SoC select"
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prompt "Broadcom MIPS SoC select"
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@ -30,6 +31,18 @@ config SOC_BMIPS_BCM6358
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help
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help
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This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
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This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
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config SOC_BMIPS_BCM63268
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bool "BMIPS BCM63268 family"
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select SUPPORTS_BIG_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select MIPS_TUNE_4KC
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select MIPS_L1_CACHE_SHIFT_4
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select SWAP_IO_SPACE
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select SYSRESET_SYSCON
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help
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This supports BMIPS BCM63268 family including BCM63168, BCM63169,
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BCM63268 and BCM63269.
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endchoice
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endchoice
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choice
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choice
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25
include/configs/bmips_bcm63268.h
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25
include/configs/bmips_bcm63268.h
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_BMIPS_BCM63268_H
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#define __CONFIG_BMIPS_BCM63268_H
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/* CPU */
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#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
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/* RAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* U-Boot */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
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#if defined(CONFIG_BMIPS_BOOT_RAM)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
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#endif
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#endif /* __CONFIG_BMIPS_BCM63268_H */
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