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st_smi: Enhance the error handling

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This commit does the following:
 - Reports error if SNOR flash is not found on the board
 - Changes smi_read_sr to return error using which a retry mechanism is
   implemented for reading flash status

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Amit Virdi 2012-05-07 13:00:22 +05:30 committed by Albert ARIBAUD
parent 0e88ff08fe
commit 69fcb55f71
1 changed files with 21 additions and 13 deletions
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34
drivers/mtd/st_smi.c
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@ -108,11 +108,17 @@ static ulong flash_get_size(ulong base, int banknum)
{ {
flash_info_t *info = &flash_info[banknum]; flash_info_t *info = &flash_info[banknum];
struct flash_dev *dev; struct flash_dev *dev;
unsigned int value; int value;
unsigned int density; unsigned int density;
int i; int i;
value = smi_read_id(info, banknum); value = smi_read_id(info, banknum);
if (value < 0) {
printf("Flash id could not be read\n");
return 0;
}
density = (value >> 16) & 0xff; density = (value >> 16) & 0xff;
for (i = 0, dev = &flash_ids[0]; dev->density != 0x0; for (i = 0, dev = &flash_ids[0]; dev->density != 0x0;
@ -140,7 +146,7 @@ static ulong flash_get_size(ulong base, int banknum)
* This routine will get the status register of the flash chip present at the * This routine will get the status register of the flash chip present at the
* given bank * given bank
*/ */
static unsigned int smi_read_sr(int bank) static int smi_read_sr(int bank)
{ {
u32 ctrlreg1; u32 ctrlreg1;
@ -174,13 +180,11 @@ static unsigned int smi_read_sr(int bank)
*/ */
static int smi_wait_till_ready(int bank, int timeout) static int smi_wait_till_ready(int bank, int timeout)
{ {
int count; int sr;
unsigned int sr;
/* One chip guarantees max 5 msec wait here after page writes, /* One chip guarantees max 5 msec wait here after page writes,
but potentially three seconds (!) after page erase. */ but potentially three seconds (!) after page erase. */
for (count = 0; count < timeout; count++) { do {
sr = smi_read_sr(bank); sr = smi_read_sr(bank);
if (sr < 0) if (sr < 0)
break; break;
@ -189,7 +193,8 @@ static int smi_wait_till_ready(int bank, int timeout)
/* Try again after 1m-sec */ /* Try again after 1m-sec */
udelay(1000); udelay(1000);
} } while (timeout--);
printf("SMI controller is still in wait, timeout=%d\n", timeout); printf("SMI controller is still in wait, timeout=%d\n", timeout);
return -EIO; return -EIO;
} }
@ -205,6 +210,7 @@ static int smi_write_enable(int bank)
{ {
u32 ctrlreg1; u32 ctrlreg1;
int timeout = WMODE_TOUT; int timeout = WMODE_TOUT;
int sr;
/* Store the CTRL REG1 state */ /* Store the CTRL REG1 state */
ctrlreg1 = readl(&smicntl->smi_cr1); ctrlreg1 = readl(&smicntl->smi_cr1);
@ -221,15 +227,17 @@ static int smi_write_enable(int bank)
/* Restore the CTRL REG1 state */ /* Restore the CTRL REG1 state */
writel(ctrlreg1, &smicntl->smi_cr1); writel(ctrlreg1, &smicntl->smi_cr1);
while (timeout--) { do {
if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT))) sr = smi_read_sr(bank);
if (sr < 0)
break; break;
udelay(1000); else if (sr & (1 << (bank + WM_SHIFT)))
}
if (timeout)
return 0; return 0;
/* Try again after 1m-sec */
udelay(1000);
} while (timeout--);
return -1; return -1;
} }